Searched refs:SRegs (Results 1 – 2 of 2) sorted by relevance
1465 BitVector SRegs(Hexagon::NUM_TARGET_REGS); in assignCalleeSavedSpillSlots() local1478 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()1481 LLVM_DEBUG(dbgs() << "SRegs.1: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()1490 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()1494 LLVM_DEBUG(dbgs() << "SRegs.2: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()1502 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()1520 SRegs |= TmpSup; in assignCalleeSavedSpillSlots()1521 LLVM_DEBUG(dbgs() << "SRegs.4: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()1526 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()1529 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()[all …]
4243 SmallVector<unsigned, 8> SRegs; in readlaneVGPRToSGPR() local4249 SRegs.push_back(SGPR); in readlaneVGPRToSGPR()4256 MIB.addReg(SRegs[i]); in readlaneVGPRToSGPR()