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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMInstPrinter.h29 const MCSubtargetInfo &STI, raw_ostream &O) override;
34 const MCSubtargetInfo &STI, raw_ostream &O);
35 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
39 const MCSubtargetInfo &STI,
44 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
48 const MCSubtargetInfo &STI, raw_ostream &O);
50 const MCSubtargetInfo &STI, raw_ostream &O);
53 const MCSubtargetInfo &STI, raw_ostream &O);
55 const MCSubtargetInfo &STI, raw_ostream &O);
57 const MCSubtargetInfo &STI, raw_ostream &O);
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DARMTargetStreamer.cpp119 static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI) { in getArchForCPU() argument
120 if (STI.getCPU() == "xscale") in getArchForCPU()
123 if (STI.hasFeature(ARM::HasV8Ops)) { in getArchForCPU()
124 if (STI.hasFeature(ARM::FeatureRClass)) in getArchForCPU()
127 } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps)) in getArchForCPU()
129 else if (STI.hasFeature(ARM::HasV8MMainlineOps)) in getArchForCPU()
131 else if (STI.hasFeature(ARM::HasV7Ops)) { in getArchForCPU()
132 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU()
135 } else if (STI.hasFeature(ARM::HasV6T2Ops)) in getArchForCPU()
137 else if (STI.hasFeature(ARM::HasV8MBaselineOps)) in getArchForCPU()
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DARMMCCodeEmitter.cpp63 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb()
64 return STI.getFeatureBits()[ARM::ModeThumb]; in isThumb()
67 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2()
68 return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2]; in isThumb2()
71 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO()
72 const Triple &TT = STI.getTargetTriple(); in isTargetMachO()
82 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
95 const MCSubtargetInfo &STI) const;
100 const MCSubtargetInfo &STI) const;
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DARMInstPrinter.cpp92 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
106 printSBitModifierOperand(MI, 6, STI, O); in printInst()
107 printPredicateOperand(MI, 4, STI, O); in printInst()
128 printSBitModifierOperand(MI, 5, STI, O); in printInst()
129 printPredicateOperand(MI, 3, STI, O); in printInst()
153 printPredicateOperand(MI, 2, STI, O); in printInst()
157 printRegisterList(MI, 4, STI, O); in printInst()
167 printPredicateOperand(MI, 4, STI, O); in printInst()
182 printPredicateOperand(MI, 2, STI, O); in printInst()
186 printRegisterList(MI, 4, STI, O); in printInst()
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DARMAsmBackend.h24 const MCSubtargetInfo &STI; variable
27 ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI, in ARMAsmBackend() argument
29 : MCAsmBackend(Endian), STI(STI), in ARMAsmBackend()
30 isThumbMode(STI.getTargetTriple().isThumb()) {} in ARMAsmBackend()
38 bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; } in hasNOP()
50 const MCSubtargetInfo *STI) const;
55 const MCSubtargetInfo *STI) const override;
57 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const override;
69 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUInstPrinter.h27 const MCSubtargetInfo &STI, raw_ostream &O);
31 const MCSubtargetInfo &STI, raw_ostream &O) override;
37 const MCSubtargetInfo &STI, raw_ostream &O);
40 const MCSubtargetInfo &STI, raw_ostream &O);
45 const MCSubtargetInfo &STI, raw_ostream &O);
52 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54 void printFlatOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
59 void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
62 const MCSubtargetInfo &STI, raw_ostream &O);
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DAMDGPUInstPrinter.cpp30 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
33 printInstruction(MI, Address, STI, OS); in printInst()
38 const MCSubtargetInfo &STI, in printU4ImmOperand() argument
49 const MCSubtargetInfo &STI, in printU16ImmOperand() argument
57 printU32ImmOperand(MI, OpNo, STI, O); in printU16ImmOperand()
76 const MCSubtargetInfo &STI, in printU32ImmOperand() argument
112 const MCSubtargetInfo &STI, in printOffset() argument
122 const MCSubtargetInfo &STI, in printFlatOffset() argument
134 if (AMDGPU::isGFX10(STI)) { in printFlatOffset()
144 const MCSubtargetInfo &STI, in printOffset0() argument
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DSIMCCodeEmitter.cpp49 const MCSubtargetInfo &STI) const;
61 const MCSubtargetInfo &STI) const override;
66 const MCSubtargetInfo &STI) const override;
72 const MCSubtargetInfo &STI) const override;
76 const MCSubtargetInfo &STI) const override;
80 const MCSubtargetInfo &STI) const override;
84 const MCSubtargetInfo &STI) const override;
108 static uint32_t getLit16Encoding(uint16_t Val, const MCSubtargetInfo &STI) { in getLit16Encoding() argument
138 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
144 static uint32_t getLit32Encoding(uint32_t Val, const MCSubtargetInfo &STI) { in getLit32Encoding() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.h29 const MCSubtargetInfo &STI, raw_ostream &O) override;
34 const MCSubtargetInfo &STI, raw_ostream &O);
35 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
39 const MCSubtargetInfo &STI,
50 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
53 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
64 const MCSubtargetInfo &STI, raw_ostream &O) { in printPostIncOperand() argument
69 const MCSubtargetInfo &STI, raw_ostream &O);
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DAArch64MCCodeEmitter.cpp58 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
78 const MCSubtargetInfo &STI) const;
84 const MCSubtargetInfo &STI) const;
90 const MCSubtargetInfo &STI) const;
96 const MCSubtargetInfo &STI) const;
103 const MCSubtargetInfo &STI) const;
109 const MCSubtargetInfo &STI) const;
115 const MCSubtargetInfo &STI) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.h35 bool isMicroMips(const MCSubtargetInfo &STI) const;
36 bool isMips32r6(const MCSubtargetInfo &STI) const;
47 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
52 const MCSubtargetInfo &STI) const override;
58 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
78 const MCSubtargetInfo &STI) const;
82 const MCSubtargetInfo &STI) const;
86 const MCSubtargetInfo &STI) const;
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DMipsMCCodeEmitter.cpp120 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips()
121 return STI.getFeatureBits()[Mips::FeatureMicroMips]; in isMicroMips()
124 bool MipsMCCodeEmitter::isMips32r6(const MCSubtargetInfo &STI) const { in isMips32r6()
125 return STI.getFeatureBits()[Mips::FeatureMips32r6]; in isMips32r6()
133 const MCSubtargetInfo &STI, in EmitInstruction() argument
139 if (IsLittleEndian && Size == 4 && isMicroMips(STI)) { in EmitInstruction()
140 EmitInstruction(Val >> 16, 2, STI, OS); in EmitInstruction()
141 EmitInstruction(Val, 2, STI, OS); in EmitInstruction()
155 const MCSubtargetInfo &STI) const in encodeInstruction()
183 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
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DMipsTargetStreamer.cpp37 static bool isMicroMips(const MCSubtargetInfo *STI) { in isMicroMips() argument
38 return STI->getFeatureBits()[Mips::FeatureMicroMips]; in isMicroMips()
132 const MCSubtargetInfo *STI) { in emitDirectiveCpRestore() argument
167 const MCSubtargetInfo *STI) { in emitR() argument
172 getStreamer().EmitInstruction(TmpInst, *STI); in emitR()
176 SMLoc IDLoc, const MCSubtargetInfo *STI) { in emitRX() argument
182 getStreamer().EmitInstruction(TmpInst, *STI); in emitRX()
186 SMLoc IDLoc, const MCSubtargetInfo *STI) { in emitRI() argument
187 emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI); in emitRI()
191 SMLoc IDLoc, const MCSubtargetInfo *STI) { in emitRR() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp226 void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream) { in streamIsaVersion() argument
227 auto TargetTriple = STI->getTargetTriple(); in streamIsaVersion()
228 auto Version = getIsaVersion(STI->getCPU()); in streamIsaVersion()
239 if (hasXNACK(*STI)) in streamIsaVersion()
241 if (hasSRAMECC(*STI)) in streamIsaVersion()
247 bool hasCodeObjectV3(const MCSubtargetInfo *STI) { in hasCodeObjectV3() argument
248 return STI->getTargetTriple().getOS() == Triple::AMDHSA && in hasCodeObjectV3()
249 STI->getFeatureBits().test(FeatureCodeObjectV3); in hasCodeObjectV3()
252 unsigned getWavefrontSize(const MCSubtargetInfo *STI) { in getWavefrontSize() argument
253 if (STI->getFeatureBits().test(FeatureWavefrontSize16)) in getWavefrontSize()
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DAMDGPUBaseInfo.h69 void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream);
73 bool hasCodeObjectV3(const MCSubtargetInfo *STI);
76 unsigned getWavefrontSize(const MCSubtargetInfo *STI);
79 unsigned getLocalMemorySize(const MCSubtargetInfo *STI);
83 unsigned getEUsPerCU(const MCSubtargetInfo *STI);
87 unsigned getMaxWorkGroupsPerCU(const MCSubtargetInfo *STI,
92 unsigned getMaxWavesPerCU(const MCSubtargetInfo *STI);
96 unsigned getMaxWavesPerCU(const MCSubtargetInfo *STI,
101 unsigned getMinWavesPerEU(const MCSubtargetInfo *STI);
105 unsigned getMaxWavesPerEU(const MCSubtargetInfo *STI);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp49 const MCSubtargetInfo &STI) const override;
55 const MCSubtargetInfo &STI) const;
61 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
78 const MCSubtargetInfo &STI) const;
81 const MCSubtargetInfo &STI) const;
84 const MCSubtargetInfo &STI) const;
87 const MCSubtargetInfo &STI) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp45 const MCSubtargetInfo &STI) const { in getDirectBrEncoding()
47 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
57 const MCSubtargetInfo &STI) const { in getCondBrEncoding()
59 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
70 const MCSubtargetInfo &STI) const { in getAbsDirectBrEncoding()
72 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
83 const MCSubtargetInfo &STI) const { in getAbsCondBrEncoding()
85 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
95 const MCSubtargetInfo &STI) const { in getImm16Encoding()
97 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
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DPPCMCCodeEmitter.h40 const MCSubtargetInfo &STI) const;
43 const MCSubtargetInfo &STI) const;
46 const MCSubtargetInfo &STI) const;
49 const MCSubtargetInfo &STI) const;
52 const MCSubtargetInfo &STI) const;
55 const MCSubtargetInfo &STI) const;
58 const MCSubtargetInfo &STI) const;
61 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
67 const MCSubtargetInfo &STI) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenMCCodeEmitter.inc11 const MCSubtargetInfo &STI) const {
4511 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4515 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4527 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4531 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4535 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4542 op = getVPTMaskOpValue(MI, 0, Fixups, STI);
4551 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4555 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4563 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/InstPrinter/
DVEInstPrinter.cpp43 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
45 if (!printAliasInstr(MI, STI, OS)) in printInst()
46 printInstruction(MI, Address, STI, OS); in printInst()
51 const MCSubtargetInfo &STI, raw_ostream &O) { in printOperand() argument
75 const MCSubtargetInfo &STI, in printMemASXOperand() argument
79 printOperand(MI, opNum, STI, O); in printMemASXOperand()
81 printOperand(MI, opNum + 1, STI, O); in printMemASXOperand()
87 printOperand(MI, opNum + 1, STI, O); in printMemASXOperand()
90 printOperand(MI, opNum, STI, O); in printMemASXOperand()
95 const MCSubtargetInfo &STI, in printMemASOperand() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcInstPrinter.cpp37 bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const { in isV9()
38 return (STI.getFeatureBits()[Sparc::FeatureV9]) != 0; in isV9()
47 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
49 if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O)) in printInst()
50 printInstruction(MI, Address, STI, O); in printInst()
55 const MCSubtargetInfo &STI, in printSparcAliasInstr() argument
76 O << "\tjmp "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr()
79 O << "\tcall "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr()
85 if (isV9(STI) in printSparcAliasInstr()
100 printOperand(MI, 1, STI, O); in printSparcAliasInstr()
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DSparcMCCodeEmitter.cpp58 const MCSubtargetInfo &STI) const override;
64 const MCSubtargetInfo &STI) const;
70 const MCSubtargetInfo &STI) const;
74 const MCSubtargetInfo &STI) const;
77 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
83 const MCSubtargetInfo &STI) const;
96 const MCSubtargetInfo &STI) const { in encodeInstruction()
98 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
100 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
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DSparcInstPrinter.h28 const MCSubtargetInfo &STI, raw_ostream &O) override;
29 bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
31 bool isV9(const MCSubtargetInfo &STI) const;
35 const MCSubtargetInfo &STI, raw_ostream &O);
36 bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
40 const MCSubtargetInfo &STI, raw_ostream &O);
43 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
45 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
47 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
49 bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/
DAVRMCCodeEmitter.h47 const MCSubtargetInfo &STI) const;
53 const MCSubtargetInfo &STI) const;
58 const MCSubtargetInfo &STI) const;
63 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
85 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
96 const MCSubtargetInfo &STI) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc11 const MCSubtargetInfo &STI) const {
2825 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2830 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2865 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2870 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2875 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2883 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2888 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2899 op = getMemEncoding(MI, 0, Fixups, STI);
2903 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
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