Searched refs:SecondMI (Results 1 – 5 of 5) sorted by relevance
24 const MachineInstr &SecondMI) { in isArithmeticBccPair() argument25 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()65 const MachineInstr &SecondMI) { in isArithmeticCbzPair() argument66 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()67 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()68 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()69 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()115 const MachineInstr &SecondMI) { in isAESPair() argument117 switch (SecondMI.getOpcode()) { in isAESPair()133 const MachineInstr &SecondMI) { in isCryptoEORPair() argument[all …]
23 const MachineInstr &SecondMI) { in isAESPair() argument25 switch(SecondMI.getOpcode()) { in isAESPair()39 const MachineInstr &SecondMI) { in isLiteralsPair() argument42 SecondMI.getOpcode() == ARM::MOVTi16) in isLiteralsPair()54 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument57 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()59 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
31 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument34 switch (SecondMI.getOpcode()) { in shouldScheduleAdjacent()47 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent()
37 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument44 const X86::SecondMacroFusionInstKind BranchKind = classifySecond(SecondMI); in shouldScheduleAdjacent()
33 const MachineInstr &SecondMI)>;