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Searched refs:Subtarget (Results 1 – 25 of 236) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMPredicates.td9 def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
11 def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
12 def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
14 def NoV5T : Predicate<"!Subtarget->hasV5TOps()">;
15 def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
17 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
19 def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
20 def HasV6M : Predicate<"Subtarget->hasV6MOps()">,
23 def HasV8MBaseline : Predicate<"Subtarget->hasV8MBaselineOps()">,
26 def HasV8MMainline : Predicate<"Subtarget->hasV8MMainlineOps()">,
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DARMISelLowering.cpp424 : TargetLowering(TM), Subtarget(&STI) { in ARMTargetLowering()
425 RegInfo = Subtarget->getRegisterInfo(); in ARMTargetLowering()
426 Itins = Subtarget->getInstrItineraryData(); in ARMTargetLowering()
431 if (!Subtarget->isTargetDarwin() && !Subtarget->isTargetIOS() && in ARMTargetLowering()
432 !Subtarget->isTargetWatchOS()) { in ARMTargetLowering()
440 if (Subtarget->isTargetMachO()) { in ARMTargetLowering()
442 if (Subtarget->isThumb() && Subtarget->hasVFP2Base() && in ARMTargetLowering()
443 Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) { in ARMTargetLowering()
516 if (Subtarget->isAAPCS_ABI() && in ARMTargetLowering()
517 (Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() || in ARMTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc58 …if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) {
61 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) {
64 …if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMips…
73 …if ((Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) …
82 …if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) {
85 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) {
88 …if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMips…
97 …if ((Subtarget->hasMips3()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) …
118 if ((Subtarget->inMips16Mode())) {
121 if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode())) {
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DMipsGenDAGISel.inc69 … OPC_CheckPatternPredicate, 0, // (Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()…
77 … OPC_CheckPatternPredicate, 1, // (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()…
85 … OPC_CheckPatternPredicate, 2, // (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit(…
93 … 69*/ OPC_CheckPatternPredicate, 3, // (Subtarget->inMicroMipsMode()) && (!Subtarget…
110 …Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) …
117 …Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (…
132 … 135*/ OPC_CheckPatternPredicate, 6, // (Subtarget->hasStandardEncoding()) && (!Subtarg…
140 /* 150*/ OPC_CheckPatternPredicate, 7, // (Subtarget->inMicroMipsMode())
157 …Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->isTargetNaCl()) …
164 … OPC_CheckPatternPredicate, 9, // (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()…
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc45 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
48 if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
51 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
60 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
63 if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
72 if ((Subtarget->hasBWI())) {
81 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
84 if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
87 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
96 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsRegisterInfo.cpp94 const MipsSubtarget &Subtarget = MF->getSubtarget<MipsSubtarget>(); in getCalleeSavedRegs() local
97 if (Subtarget.hasMips64()) in getCalleeSavedRegs()
98 return Subtarget.hasMips64r6() ? CSR_Interrupt_64R6_SaveList in getCalleeSavedRegs()
101 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
105 if (Subtarget.isSingleFloat()) in getCalleeSavedRegs()
108 if (Subtarget.isABI_N64()) in getCalleeSavedRegs()
111 if (Subtarget.isABI_N32()) in getCalleeSavedRegs()
114 if (Subtarget.isFP64bit()) in getCalleeSavedRegs()
117 if (Subtarget.isFPXX()) in getCalleeSavedRegs()
126 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getCallPreservedMask() local
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DMipsISelLowering.cpp117 return Subtarget.isABI_O32() || VT.getSizeInBits() == 32 ? MVT::i32 in getRegisterTypeForCallingConv()
126 (Subtarget.isABI_O32() ? 32 : 64)), in getNumRegistersForCallingConv()
301 : TargetLowering(TM), Subtarget(STI), ABI(TM.getABI()) { in MipsTargetLowering()
308 if (Subtarget.hasMips32r6()) in MipsTargetLowering()
361 if (!(TM.Options.NoNaNsFPMath || Subtarget.inAbs2008Mode())) { in MipsTargetLowering()
366 if (Subtarget.isGP64bit()) { in MipsTargetLowering()
381 if (!Subtarget.isGP64bit()) { in MipsTargetLowering()
388 if (Subtarget.isGP64bit()) in MipsTargetLowering()
414 if (Subtarget.hasCnMips()) { in MipsTargetLowering()
428 if (!Subtarget.hasMips32r2()) in MipsTargetLowering()
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DMipsAsmPrinter.cpp79 Subtarget = &MF.getSubtarget<MipsSubtarget>(); in runOnMachineFunction()
82 if (Subtarget->inMips16Mode()) in runOnMachineFunction()
96 if (Subtarget->isTargetNaCl()) in runOnMachineFunction()
118 bool InMicroMipsMode = Subtarget->inMicroMipsMode(); in emitPseudoIndirectBranch()
121 if (Subtarget->hasMips64r6()) { in emitPseudoIndirectBranch()
125 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
133 } else if (Subtarget->inMicroMipsMode()) in emitPseudoIndirectBranch()
144 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; in emitPseudoIndirectBranch()
165 const MipsSubtarget &Subtarget) { in emitDirectiveRelocJalr() argument
179 Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR", in emitDirectiveRelocJalr()
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DMipsSEISelLowering.cpp70 if (Subtarget.isGP64bit()) in MipsSETargetLowering()
73 if (Subtarget.hasDSP() || Subtarget.hasMSA()) { in MipsSETargetLowering()
85 if (Subtarget.hasDSP()) { in MipsSETargetLowering()
108 if (Subtarget.hasMips32r2()) { in MipsSETargetLowering()
114 if (Subtarget.hasDSPR2()) in MipsSETargetLowering()
117 if (Subtarget.hasMSA()) { in MipsSETargetLowering()
171 if (!Subtarget.useSoftFloat()) { in MipsSETargetLowering()
175 if (!Subtarget.isSingleFloat()) { in MipsSETargetLowering()
176 if (Subtarget.isFP64bit()) in MipsSETargetLowering()
188 if (Subtarget.hasCnMips()) in MipsSETargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenFastISel.inc83 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb())) {
101 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) {
104 if ((!Subtarget->isThumb()) && (!Subtarget->hasV4TOps())) {
107 if ((Subtarget->hasV4TOps()) && (!Subtarget->isThumb())) {
125 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb())) {
143 if ((Subtarget->hasFullFP16())) {
152 if ((Subtarget->hasVFP2Base())) {
161 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) {
181 if ((Subtarget->hasFullFP16())) {
190 if ((Subtarget->hasVFP2Base())) {
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DARMGenDAGISel.inc82 /* 49*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThum…
90 /* 67*/ OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
120 /* 124*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThum…
128 /* 142*/ OPC_CheckPatternPredicate, 1, // (Subtarget->isThumb2())
154 /* 193*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThumb(…
180 /* 248*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThum…
199 /* 287*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasV6Ops()) && (!Subtarget->isThum…
226 /* 342*/ OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb2())
253 /* 400*/ OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb…
272 /* 439*/ OPC_CheckPatternPredicate, 2, // (Subtarget->hasDSP()) && (Subtarget->isThumb…
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCLowerMASSVEntries.cpp54 static StringRef getCPUSuffix(const PPCSubtarget *Subtarget);
56 const PPCSubtarget *Subtarget);
58 const PPCSubtarget *Subtarget);
75 StringRef PPCLowerMASSVEntries::getCPUSuffix(const PPCSubtarget *Subtarget) { in getCPUSuffix() argument
77 if (!Subtarget) in getCPUSuffix()
79 if (Subtarget->hasP9Vector()) in getCPUSuffix()
81 if (Subtarget->hasP8Vector()) in getCPUSuffix()
92 const PPCSubtarget *Subtarget) { in createMASSVFuncName() argument
93 StringRef Suffix = getCPUSuffix(Subtarget); in createMASSVFuncName()
104 const PPCSubtarget *Subtarget) { in lowerMASSVCall() argument
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DPPCRegisterInfo.cpp143 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>(); in getCalleeSavedRegs() local
145 if (Subtarget.hasVSX()) in getCalleeSavedRegs()
147 if (Subtarget.hasAltivec()) in getCalleeSavedRegs()
152 if (Subtarget.isDarwinABI()) in getCalleeSavedRegs()
154 ? (Subtarget.hasAltivec() ? CSR_Darwin64_Altivec_SaveList in getCalleeSavedRegs()
156 : (Subtarget.hasAltivec() ? CSR_Darwin32_Altivec_SaveList in getCalleeSavedRegs()
168 if (Subtarget.hasAltivec()) in getCalleeSavedRegs()
175 if (Subtarget.hasAltivec()) in getCalleeSavedRegs()
177 else if (Subtarget.hasSPE()) in getCalleeSavedRegs()
183 if (Subtarget.hasAltivec()) in getCalleeSavedRegs()
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DPPCFrameLowering.cpp101 Subtarget(STI), ReturnSaveOffset(computeReturnSaveOffset(Subtarget)), in PPCFrameLowering()
102 TOCSaveOffset(computeTOCSaveOffset(Subtarget)), in PPCFrameLowering()
103 FramePointerSaveOffset(computeFramePointerSaveOffset(Subtarget)), in PPCFrameLowering()
104 LinkageSize(computeLinkageSize(Subtarget)), in PPCFrameLowering()
105 BasePointerSaveOffset(computeBasePointerSaveOffset(Subtarget)), in PPCFrameLowering()
111 if (Subtarget.isDarwinABI()) { in getCalleeSavedSpillSlots()
113 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
123 if (!Subtarget.isSVR4ABI()) { in getCalleeSavedSpillSlots()
273 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
486 const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo(); in determineFrameLayout()
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DPPCISelLowering.cpp139 : TargetLowering(TM), Subtarget(STI) { in PPCTargetLowering()
142 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering()
183 if (!Subtarget.hasSPE()) { in PPCTargetLowering()
199 if (Subtarget.useCRBits()) { in PPCTargetLowering()
202 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
250 if (Subtarget.isISA3_0()) { in PPCTargetLowering()
283 if (Subtarget.hasSPE()) { in PPCTargetLowering()
294 if (!Subtarget.hasFSQRT() && in PPCTargetLowering()
295 !(TM.Options.UnsafeFPMath && Subtarget.hasFRSQRTE() && in PPCTargetLowering()
296 Subtarget.hasFRE())) in PPCTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.td27 // Subtarget Features (device properties)
488 // Subtarget Features (options and debugging)
975 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
979 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
980 "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
984 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
985 "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
986 "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
990 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
994 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenFastISel.inc139 if ((Subtarget->hasNEON())) {
148 if ((Subtarget->hasNEON())) {
157 if ((Subtarget->hasNEON())) {
166 if ((Subtarget->hasNEON())) {
175 if ((Subtarget->hasNEON())) {
184 if ((Subtarget->hasNEON())) {
193 if ((Subtarget->hasNEON())) {
202 if ((Subtarget->hasNEON())) {
227 if ((Subtarget->hasNEON())) {
236 if ((Subtarget->hasNEON())) {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp51 const X86Subtarget &Subtarget = in EmitTargetCodeForMemset() local
69 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) { in EmitTargetCodeForMemset()
125 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned in EmitTargetCodeForMemset()
154 bool Use64BitRegs = Subtarget.isTarget64BitLP64(); in EmitTargetCodeForMemset()
186 static SDValue emitRepmovs(const X86Subtarget &Subtarget, SelectionDAG &DAG, in emitRepmovs() argument
189 const bool Use64BitRegs = Subtarget.isTarget64BitLP64(); in emitRepmovs()
208 static SDValue emitRepmovsB(const X86Subtarget &Subtarget, SelectionDAG &DAG, in emitRepmovsB() argument
211 return emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src, in emitRepmovsB()
216 static MVT getOptimalRepmovsType(const X86Subtarget &Subtarget, in getOptimalRepmovsType() argument
228 return Subtarget.is64Bit() ? MVT::i64 : MVT::i32; in getOptimalRepmovsType()
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DX86ISelLowering.cpp111 : TargetLowering(TM), Subtarget(STI) { in X86TargetLowering()
112 bool UseX87 = !Subtarget.useSoftFloat() && Subtarget.hasX87(); in X86TargetLowering()
113 X86ScalarSSEf64 = Subtarget.hasSSE2(); in X86TargetLowering()
114 X86ScalarSSEf32 = Subtarget.hasSSE1(); in X86TargetLowering()
127 if (Subtarget.isAtom()) in X86TargetLowering()
129 else if (Subtarget.is64Bit()) in X86TargetLowering()
133 const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo(); in X86TargetLowering()
138 if (Subtarget.hasSlowDivide32()) in X86TargetLowering()
140 if (Subtarget.hasSlowDivide64() && Subtarget.is64Bit()) in X86TargetLowering()
144 if (Subtarget.isTargetWindowsMSVC() || in X86TargetLowering()
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DX86RegisterInfo.cpp125 const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>(); in getLargestLegalSuperClass() local
134 if (!Subtarget.hasAVX512() && in getLargestLegalSuperClass()
141 if (!Subtarget.hasVLX() && in getLargestLegalSuperClass()
148 if (Subtarget.hasVLX() && in getLargestLegalSuperClass()
155 if (Subtarget.hasAVX512() && in getLargestLegalSuperClass()
181 const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>(); in getPointerRegClass() local
185 if (Subtarget.isTarget64BitLP64()) in getPointerRegClass()
201 if (Subtarget.isTarget64BitLP64()) in getPointerRegClass()
206 if (Subtarget.isTarget64BitLP64()) in getPointerRegClass()
210 if (Subtarget.isTarget64BitLP64()) in getPointerRegClass()
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DX86LegalizerInfo.cpp60 : Subtarget(STI), TM(TM) { in X86LegalizerInfo()
146 if (!Subtarget.is64Bit()) { in setLegalizerInfo32bit()
201 if (!Subtarget.is64Bit()) in setLegalizerInfo64bit()
285 if (!Subtarget.hasSSE1()) in setLegalizerInfoSSE1()
314 if (!Subtarget.hasSSE2()) in setLegalizerInfoSSE2()
361 if (!Subtarget.hasSSE41()) in setLegalizerInfoSSE41()
370 if (!Subtarget.hasAVX()) in setLegalizerInfoAVX()
413 if (!Subtarget.hasAVX2()) in setLegalizerInfoAVX2()
445 if (!Subtarget.hasAVX512()) in setLegalizerInfoAVX512()
483 if (!Subtarget.hasVLX()) in setLegalizerInfoAVX512()
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DX86FastISel.cpp51 const X86Subtarget *Subtarget; member in __anonb5d01cc70111::X86FastISel
64 Subtarget = &funcInfo.MF->getSubtarget<X86Subtarget>(); in X86FastISel()
65 X86ScalarSSEf64 = Subtarget->hasSSE2(); in X86FastISel()
66 X86ScalarSSEf32 = Subtarget->hasSSE1(); in X86FastISel()
141 return Subtarget->getInstrInfo(); in getInstrInfo()
321 bool HasSSE41 = Subtarget->hasSSE41(); in X86FastEmitLoad()
322 bool HasAVX = Subtarget->hasAVX(); in X86FastEmitLoad()
323 bool HasAVX2 = Subtarget->hasAVX2(); in X86FastEmitLoad()
324 bool HasAVX512 = Subtarget->hasAVX512(); in X86FastEmitLoad()
325 bool HasVLX = Subtarget->hasVLX(); in X86FastEmitLoad()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcRegisterInfo.cpp56 const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>(); in getReservedRegs() local
67 if (!Subtarget.is64Bit()) in getReservedRegs()
82 if (ReserveAppRegisters || !Subtarget.is64Bit()) in getReservedRegs()
90 if (!Subtarget.isV9()) { in getReservedRegs()
107 const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>(); in getPointerRegClass() local
108 return Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass; in getPointerRegClass()
173 const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>(); in eliminateFrameIndex() local
182 if (!Subtarget.isV9() || !Subtarget.hasHardQuad()) { in eliminateFrameIndex()
184 const TargetInstrInfo &TII = *Subtarget.getInstrInfo(); in eliminateFrameIndex()
196 const TargetInstrInfo &TII = *Subtarget.getInstrInfo(); in eliminateFrameIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCV.td18 def HasStdExtM : Predicate<"Subtarget->hasStdExtM()">,
25 def HasStdExtA : Predicate<"Subtarget->hasStdExtA()">,
32 def HasStdExtF : Predicate<"Subtarget->hasStdExtF()">,
40 def HasStdExtD : Predicate<"Subtarget->hasStdExtD()">,
47 def HasStdExtC : Predicate<"Subtarget->hasStdExtC()">,
54 def HasRVCHints : Predicate<"Subtarget->enableRVCHintInstrs()">,
60 def IsRV64 : Predicate<"Subtarget->is64Bit()">,
63 def IsRV32 : Predicate<"!Subtarget->is64Bit()">,
73 def IsRV32E : Predicate<"Subtarget->isRV32E()">,
DRISCVRegisterInfo.cpp44 auto &Subtarget = MF->getSubtarget<RISCVSubtarget>(); in getCalleeSavedRegs() local
46 if (Subtarget.hasStdExtD()) in getCalleeSavedRegs()
48 if (Subtarget.hasStdExtF()) in getCalleeSavedRegs()
53 switch (Subtarget.getTargetABI()) { in getCalleeSavedRegs()
158 auto &Subtarget = MF.getSubtarget<RISCVSubtarget>(); in getCallPreservedMask() local
160 switch (Subtarget.getTargetABI()) { in getCallPreservedMask()

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