Searched refs:TRAP (Results 1 – 25 of 82) sorted by relevance
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/third_party/mksh/ |
D | signames.inc | 24 { "TRAP", 5 },
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 828 TRAP, enumerator
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/third_party/toybox/lib/ |
D | portability.c | 411 SIGNIFY(USR1), SIGNIFY(USR2), SIGNIFY(SYS), SIGNIFY(TRAP),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsLegalizerInfo.cpp | 375 MachineInstr *Trap = MIRBuilder.buildInstr(Mips::TRAP); in legalizeIntrinsic()
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D | MipsScheduleP5600.td | 79 TGEU, TLT, TLTI, TLTU, TNE, TNEI, TRAP,
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D | MipsScheduleGeneric.td | 308 TRAP, SDBBP)>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 343 TRAP, enumerator
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D | AMDGPUInstrInfo.td | 97 def AMDGPUtrap : SDNode<"AMDGPUISD::TRAP",
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARM.td | 379 // Special TRAP encoding for NaCl, which looks like a TRAP in Thumb too.
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D | ARMAsmPrinter.cpp | 1814 case ARM::TRAP: { in EmitInstruction()
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D | ARMFrameLowering.cpp | 1070 RetOpcode == ARM::TRAP || RetOpcode == ARM::TRAPNaCl || in emitPopInst()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 383 case ISD::TRAP: return "trap"; in getOperationName()
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D | StatepointLowering.cpp | 1067 DAG.getNode(ISD::TRAP, getCurSDLoc(), MVT::Other, DAG.getRoot())); in LowerDeoptimizingReturn()
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D | FastISel.cpp | 1860 return fastEmit_(MVT::Other, MVT::Other, ISD::TRAP) != 0; in selectOperator()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcInstr64Bit.td | 511 defm TXCC : TRAP<"%xcc">;
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D | SparcInstrInfo.td | 995 multiclass TRAP<string regStr> { 1007 defm TICC : TRAP<"%icc">;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCPseudoLowering.inc | 1003 case Mips::TRAP: {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 763 setOperationAction(ISD::TRAP, MVT::Other, Expand); in initActions()
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/third_party/mesa3d/src/freedreno/registers/ |
D | rules-ng-ng.txt | 539 <reg32 offset="0x108" name="TRAP" />
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 275 setOperationAction(ISD::TRAP, MVT::Other, Legal); in WebAssemblyTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrSystem.td | 25 def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
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D | X86InstructionSelector.cpp | 1727 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::TRAP)); in selectIntrinsicWSideEffects()
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/third_party/rust/crates/memchr/bench/data/sliceslice/ |
D | words.txt | 4255 TRAP
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | P9InstrResources.td | 1421 TRAP,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 111 setOperationAction(ISD::TRAP, MVT::Other, Legal); in XCoreTargetLowering()
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