| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3609 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3610 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in matchBEXTRFromAndImm()
3612 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)}; in matchBEXTRFromAndImm()
3645 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3646 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPISTR()
3647 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPISTR()
3678 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
3679 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPESTR()
3680 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPESTR()
4226 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Load; in tryVPTESTM() local
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| D | X86ISelLowering.cpp | 32753 unsigned Tmp0 = SrcBits, Tmp1 = SrcBits; in ComputeNumSignBitsForTargetNode() local
32755 Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1); in ComputeNumSignBitsForTargetNode()
32758 unsigned Tmp = std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
32794 unsigned Tmp0 = in ComputeNumSignBitsForTargetNode() local
32796 if (Tmp0 == 1) return 1; // Early out. in ComputeNumSignBitsForTargetNode()
32799 return std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
32803 unsigned Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), Depth+1); in ComputeNumSignBitsForTargetNode() local
32804 if (Tmp0 == 1) return 1; // Early out. in ComputeNumSignBitsForTargetNode()
32806 return std::min(Tmp0, Tmp1); in ComputeNumSignBitsForTargetNode()
32845 unsigned Tmp0 = VTBits; in ComputeNumSignBitsForTargetNode() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUPromoteAlloca.cpp | 815 Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ, "", true, true); in handleAlloca() local
816 Tmp0 = Builder.CreateMul(Tmp0, TIdX); in handleAlloca()
818 Value *TID = Builder.CreateAdd(Tmp0, Tmp1); in handleAlloca()
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| D | AMDGPUCodeGenPrepare.cpp | 825 Value *Tmp0 = Builder.CreateSelect(RCP_HI_0_CC, RCP_A_E, RCP_S_E); in expandDivRem32() local
828 Value *Quotient = getMulHu(Builder, Tmp0, Num); in expandDivRem32()
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| D | AMDGPUISelLowering.cpp | 1896 SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT), in LowerUDIVREM() local
1900 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); in LowerUDIVREM()
2112 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not); in LowerFTRUNC() local
2122 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC()
2225 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, L, M); in LowerFROUND64() local
2227 DAG.getConstant(0, SL, MVT::i64), Tmp0, in LowerFROUND64()
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| D | AMDGPULegalizerInfo.cpp | 1463 auto Tmp0 = B.buildAnd(S64, Src, Not); in legalizeIntrinsicTrunc() local
1469 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 387 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
388 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
399 Tmp0 = InReg; in LowerFPToInt()
401 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
405 BuildMI(BB, DL, TII.get(LT), CmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
415 BuildMI(BB, DL, TII.get(GE), SecondCmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 254 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True}); in generateUnsignedDivisionCode() local
256 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5502 SDValue Tmp0 = Op.getOperand(0); in LowerFCOPYSIGN() local
5507 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
5508 Tmp0.getOpcode() == ARMISD::VMOVDRR; in LowerFCOPYSIGN()
5522 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
5533 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
5544 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
5567 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
5568 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
5570 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
5574 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 7589 SDValue Tmp0 = getValue(I.getArgOperand(0)); in visitBinaryFloatCall() local
7591 EVT VT = Tmp0.getValueType(); in visitBinaryFloatCall()
7592 setValue(&I, DAG.getNode(Opcode, getCurSDLoc(), VT, Tmp0, Tmp1)); in visitBinaryFloatCall()
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