Searched refs:UREG (Results 1 – 3 of 3) sorted by relevance
/third_party/mesa3d/src/gallium/drivers/i915/ |
D | i915_fpc_emit.c | 66 return UREG(REG_TYPE_U, (bit - 1)); in i915_get_utemp() 79 uint32_t reg = UREG(type, nr); in i915_emit_decl() 114 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); in i915_emit_arith() 181 const uint32_t k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord)); in i915_emit_texld() 201 tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */ in i915_emit_texld() 223 assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); in i915_emit_texld() 264 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO); in i915_emit_const1f() 266 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE); in i915_emit_const1f() 278 return swizzle(UREG(REG_TYPE_CONST, reg), idx, ZERO, ZERO, ONE); in i915_emit_const1f() 316 return swizzle(UREG(REG_TYPE_CONST, reg), idx, idx + 1, ZERO, ONE); in i915_emit_const2f() [all …]
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D | i915_fpc_translate.c | 147 src = UREG(REG_TYPE_R, index); in src_vector() 238 return negate(swizzle(UREG(REG_TYPE_R, 0), in src_vector() 248 src = UREG(REG_TYPE_CONST, index); in src_vector() 291 return UREG(REG_TYPE_OD, 0); in get_result_vector() 293 return UREG(REG_TYPE_OC, 0); in get_result_vector() 300 return UREG(REG_TYPE_R, dest->Register.Index); in get_result_vector() 583 negate(swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE), in i915_translate_instruction() 710 const uint32_t zero = swizzle(UREG(REG_TYPE_R, 0), in i915_translate_instruction() 763 const uint32_t zero = swizzle(UREG(REG_TYPE_R, 0), in i915_translate_instruction() 1073 const uint32_t depth = UREG(REG_TYPE_OD, 0); in i915_fixup_depth_write()
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D | i915_fpc.h | 113 #define UREG(type, nr) \ macro
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