| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 3300 add(vform, result, zdn, zm).UnsignedSaturate(vform); in Simulator()
3303 sub(vform, result, zdn, zm).UnsignedSaturate(vform); in Simulator()
3306 sub(vform, result, zm, zdn).UnsignedSaturate(vform); in Simulator()
7290 add(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
7296 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
7308 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
7320 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in Simulator()
8801 add(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
8807 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
8813 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in Simulator()
[all …]
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| D | logic-aarch64.cc | 1685 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1696 return sshl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in sqshlu()
2266 return extractnarrow(vform, dst, false, src, true).UnsignedSaturate(vform); in sqxtun()
2273 return extractnarrow(vform, dst, false, src, false).UnsignedSaturate(vform); in uqxtn()
3338 return shrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn()
3346 return shrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn2()
3354 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn()
3362 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn2()
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| D | simulator-aarch64.h | 715 LogicVRegister& UnsignedSaturate(VectorFormat vform) { in UnsignedSaturate() function
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-logic-arm64.cc | 1422 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1430 return sshl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in sqshlu()
1821 return ExtractNarrow(vform, dst, false, src, true).UnsignedSaturate(vform); in sqxtun()
1826 return ExtractNarrow(vform, dst, false, src, false).UnsignedSaturate(vform); in uqxtn()
2231 return shrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn()
2236 return shrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn2()
2241 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn()
2246 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn2()
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| D | simulator-arm64.cc | 4374 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4380 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4392 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4404 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEON3Same()
5577 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5583 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5589 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5601 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEONScalar3Same()
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| D | simulator-arm64.h | 574 LogicVRegister& UnsignedSaturate(VectorFormat vform) { in UnsignedSaturate() function
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