Searched refs:VALIGN (Results 1 – 10 of 10) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 87 VALIGN, // Align two vectors (in Op0, Op1) to one that would have enumerator
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| D | HexagonISelLowering.cpp | 1728 case HexagonISD::VALIGN: return "HexagonISD::VALIGN"; in getTargetNodeName()
2791 SDValue Aligned = DAG.getNode(HexagonISD::VALIGN, dl, LoadTy, in LowerUnalignedLoad()
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| D | HexagonISelDAGToDAG.cpp | 892 case HexagonISD::VALIGN: return SelectVAlign(N); in Select()
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| D | HexagonPatterns.td | 110 def HexagonVALIGN: SDNode<"HexagonISD::VALIGN", SDTVecVecIntOp>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 376 VALIGN, enumerator
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| D | X86InstrFragmentsSIMD.td | 372 def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
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| D | X86SchedSkylakeServer.td | 1669 def: InstRW<[SKXWriteResGroup136], (instregex "VALIGN(D|Q)Z128rm(b?)i",
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| D | X86ISelLowering.cpp | 11807 return DAG.getNode(X86ISD::VALIGN, DL, VT, Lo, Hi, in lowerShuffleAsRotate()
29759 case X86ISD::VALIGN: return "X86ISD::VALIGN"; in getTargetNodeName()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.3.0.rst | 3346 - intel/isl: Use a switch for HALIGN/VALIGN encoding
3348 - intel: Add underscores to HALIGN and VALIGN enums
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| D | 22.0.0.rst | 2468 - intel/genxml: Decode VALIGN/HALIGN values in XY_BLOCK_COPY_BLT
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