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Searched refs:VARYING_BIT_LAYER (Results 1 – 19 of 19) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_shader_info.c520 per_prim_mask |= VARYING_BIT_LAYER; in radv_nir_shader_info_pass()
527 outinfo->writes_layer = per_vtx_mask & VARYING_BIT_LAYER; in radv_nir_shader_info_pass()
532 outinfo->writes_layer_per_primitive = per_prim_mask & VARYING_BIT_LAYER; in radv_nir_shader_info_pass()
635 info->ps.layer_input = nir->info.inputs_read & VARYING_BIT_LAYER; in radv_nir_shader_info_pass()
Dradv_shader.c1121 nir->info.inputs_read |= VARYING_BIT_LAYER; in lower_view_index()
1123 nir->info.per_primitive_inputs |= VARYING_BIT_LAYER; in lower_view_index()
Dradv_pipeline.c3131 VARYING_BIT_LAYER)) { in radv_link_shaders()
/third_party/mesa3d/src/intel/compiler/
Dbrw_vue_map.c93 slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PRIMITIVE_SHADING_RATE); in brw_compute_vue_map()
Dbrw_fs_visitor.cpp767 … VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PSIZ | VARYING_BIT_PRIMITIVE_SHADING_RATE; in emit_urb_writes()
858 if (vue_map->slots_valid & VARYING_BIT_LAYER) in emit_urb_writes()
Dbrw_compiler.h2025 …if ((inputs_read & (VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PRIMITIVE_SHADING_RATE)… in brw_compute_first_urb_slot_required()
Dbrw_fs.cpp1793 VARYING_BIT_LAYER | in calculate_urb_setup()
1804 if (per_prim_inputs_read & VARYING_BIT_LAYER) in calculate_urb_setup()
1858 VARYING_BIT_PSIZ | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT; in calculate_urb_setup()
1885 if (inputs_read & VARYING_BIT_LAYER) in calculate_urb_setup()
/third_party/mesa3d/src/compiler/
Dshader_enums.h503 #define VARYING_BIT_LAYER BITFIELD64_BIT(VARYING_SLOT_LAYER) macro
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_draw.c155 .layer_zero = !gs_info || !(gs_info->outputs_written & VARYING_BIT_LAYER), in fd6_draw_vbo()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_info.c666 info->writes_layer = nir->info.outputs_written & VARYING_BIT_LAYER; in si_nir_scan_shader()
/third_party/mesa3d/src/freedreno/ir3/
Dir3_nir.c676 so->key.layer_zero && (s->info.inputs_read & VARYING_BIT_LAYER); in ir3_nir_lower_variant()
Dir3_shader.c538 if (info->inputs_read & VARYING_BIT_LAYER) { in ir3_setup_used_key()
/third_party/mesa3d/src/amd/common/
Dac_nir_lower_ngg.c2747 b->shader->info.outputs_written |= VARYING_BIT_LAYER; in emit_ms_finale()
2748 b->shader->info.per_primitive_outputs |= VARYING_BIT_LAYER; in emit_ms_finale()
3047 .insert_layer_output = multiview && !(shader->info.outputs_written & VARYING_BIT_LAYER), in ac_nir_lower_ngg_ms()
/third_party/mesa3d/src/gallium/drivers/d3d12/
Dd3d12_compiler.cpp885 system_out_values |= VARYING_BIT_PSIZ | VARYING_BIT_VIEWPORT | VARYING_BIT_LAYER; in d3d12_fill_shader_key()
/third_party/mesa3d/src/microsoft/compiler/
Dnir_to_dxil.c5528 (VARYING_BIT_VIEWPORT | VARYING_BIT_LAYER)) in emit_module()
5856 0 : (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT | VARYING_BIT_LAYER); in nir_to_dxil()
5860 (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT | VARYING_BIT_LAYER); in nir_to_dxil()
/third_party/mesa3d/src/intel/vulkan/
DgenX_pipeline.c1226 !(last->vue_map.slots_valid & VARYING_BIT_LAYER); in emit_3dstate_clip()
/third_party/mesa3d/src/freedreno/vulkan/
Dtu_pipeline.c2958 ir3_key.layer_zero = !(outputs_written & VARYING_BIT_LAYER); in tu_pipeline_builder_compile_shaders()
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_state.c4205 if (!(vue_map->slots_valid & VARYING_BIT_LAYER)) in iris_emit_sbe_swiz()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_state.c4478 if (!(vue_map->slots_valid & VARYING_BIT_LAYER)) in get_attr_override()