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Searched refs:VEX_4V (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSSE.td216 VEX_4V, VEX_LIG, VEX_WIG;
643 VEX_4V, VEX_WIG;
793 VEX_4V, Sched<[SchedWriteFShuffle.XMM]>, VEX_WIG;
800 VEX_4V, Sched<[SchedWriteFShuffle.XMM]>, VEX_WIG,
895 WriteCvtI2SS, SSEPackedSingle>, XS, VEX_4V,
898 WriteCvtI2SS, SSEPackedSingle>, XS, VEX_4V,
901 WriteCvtI2SD, SSEPackedDouble>, XD, VEX_4V,
904 WriteCvtI2SD, SSEPackedDouble>, XD, VEX_4V,
1014 XS, VEX_4V, VEX_LIG, SIMD_EXC;
1017 XS, VEX_4V, VEX_LIG, VEX_W, SIMD_EXC;
[all …]
DX86InstrFormats.td217 class VEX_4V : VEX { bit hasVEX_4V = 1; }
888 VEX_4V, FMASC, Requires<[HasFMA, NoFMA4, NoVLX]>;
892 VEX_4V, FMASC, Requires<[HasFMA, NoFMA4, NoAVX512]>;
896 VEX_4V, FMASC, Requires<[HasFMA, NoAVX512]>;
902 VEX_4V, FMASC, Requires<[HasFMA4, NoVLX]>;
906 VEX_4V, FMASC, Requires<[HasFMA4, NoAVX512]>;
910 VEX_4V, FMASC, Requires<[HasFMA4]>;
933 VEX_4V, Requires<[HasXOP]>;
DX86InstrArithmetic.td1288 defm ANDN32 : bmi_andn<"andn{l}", GR32, i32mem, loadi32, WriteALU>, T8PS, VEX_4V;
1289 defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64, WriteALU>, T8PS, VEX_4V, VEX_W;
1312 []>, T8XD, VEX_4V, Sched<[sched, WriteIMulH]>;
1317 []>, T8XD, VEX_4V, Sched<[sched.Folded, WriteIMulH]>;
DX86InstrInfo.td2423 T8PS, VEX_4V, Sched<[sched]>;
2427 T8PS, VEX_4V, Sched<[sched.Folded]>;
2589 VEX_4V, Sched<[WriteALU]>;
2593 VEX_4V, Sched<[WriteALU.Folded, WriteALU.ReadAfterFold]>;
DX86MCInstLower.cpp919 !(TSFlags & X86II::VEX_W) && (TSFlags & X86II::VEX_4V) && in Lower()
DX86InstrAVX512.td3002 sched, HasDQI, IsCommutable>, VEX_4V, VEX_L, PD;
3004 sched, prdW, IsCommutable>, VEX_4V, VEX_L, PS;
3006 sched, HasBWI, IsCommutable>, VEX_4V, VEX_L, VEX_W, PD;
3008 sched, HasBWI, IsCommutable>, VEX_4V, VEX_L, VEX_W, PS;
3065 VEX_4V, VEX_L, Sched<[sched]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp747 bool HasVEX_4V = TSFlags & X86II::VEX_4V; in emitVEXOpcodePrefix()
813 uint8_t VEX_4V = 0xf; in emitVEXOpcodePrefix() local
894 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
921 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
947 VEX_4V = ~getX86RegEncoding(MI, CurOp + X86::AddrNumOperands) & 0xf; in emitVEXOpcodePrefix()
956 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
978 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
1012 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
1040 VEX_4V = ~getX86RegEncoding(MI, CurOp++) & 0xf; in emitVEXOpcodePrefix()
1049 VEX_4V = ~VRegEnc & 0xf; in emitVEXOpcodePrefix()
[all …]
DX86BaseInfo.h865 VEX_4V = 1ULL << VEX_4VShift, enumerator
1016 bool HasVEX_4V = TSFlags & X86II::VEX_4V; in getMemoryOperandNo()