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Searched refs:VOP3P (Results 1 – 20 of 20) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_opcodes.py71 VOP3P = 19 variable in Format
157 elif self == Format.VOP3P:
973 opcode(name, -1, code, code, Format.VOP3P, InstrClass.Valu32, modifiers, modifiers)
974 opcode("v_dot2_i32_i16", -1, 0x26, 0x14, Format.VOP3P, InstrClass.Valu32)
975 opcode("v_dot2_u32_u16", -1, 0x27, 0x15, Format.VOP3P, InstrClass.Valu32)
976 opcode("v_dot4_i32_i8", -1, 0x28, 0x16, Format.VOP3P, InstrClass.Valu32)
977 opcode("v_dot4_u32_u8", -1, 0x29, 0x17, Format.VOP3P, InstrClass.Valu32)
Daco_opt_value_numbering.cpp228 case Format::VOP3P: { in operator ()()
Daco_ir.h97 VOP3P = 19, enumerator
1247 constexpr bool isVOP3P() const noexcept { return format == Format::VOP3P; } in isVOP3P()
Daco_print_ir.cpp553 case Format::VOP3P: { in print_instr_format_specific()
Daco_optimizer.cpp3104 !instr->isSDWA() && instr->format != Format::VOP3P) in apply_sgprs()
3570 create_instruction<VOP3P_instruction>(mad, Format::VOP3P, 3, 1)}; in combine_vop3p()
3632 create_instruction<VOP3P_instruction>(aco_opcode::v_fma_mix_f32, Format::VOP3P, 3, 1)}; in to_mad_mix()
4073 create_instruction<VOP3P_instruction>(mad_op, Format::VOP3P, 3, 1)}; in combine_instruction()
4769 if (instr->isVALU() && i > 0 && instr->format != Format::VOP3P) in apply_literals()
Daco_register_allocation.cpp512 if (instr->format == Format::VOP3P) in get_subdword_operand_stride()
/third_party/mesa3d/docs/relnotes/
D21.3.4.rst70 - aco: don't allow SDWA on VOP3P instructions
71 - aco: validate VOP3P opsel correctly
D21.3.3.rst54 - aco/optimizer: fix fneg modifier propagation on VOP3P
D22.0.0.rst839 - aco/optimizer: fix fneg modifier propagation on VOP3P
840 - aco: change fneg for VOP3P to use fmul with +1.0
841 - aco/optimizer: propagate and fold inline constants on VOP3P instructions
844 - aco: don't allow SDWA on VOP3P instructions
851 - aco: don't split VOP3P definitions
852 - aco: validate VOP3P opsel correctly
D21.0.0.rst835 - aco: fix VOP3P assembly, VN and validation
836 - aco/RA: fix subdword operands on VOP3P instructions
837 - aco: allow constants/literals on every src position for VOP3P
838 - aco: allow SGPRs on every src position for VOP3P
D21.1.0.rst1343 - aco: fix VOP3P assembly, VN and validation
1344 - aco/RA: fix subdword operands on VOP3P instructions
1345 - aco: allow constants/literals on every src position for VOP3P
1346 - aco: allow SGPRs on every src position for VOP3P
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrFormats.td32 field bit VOP3P = 0;
107 // This bit indicates that this is a packed VOP3P instruction
144 let TSFlags{12} = VOP3P;
DVOP3PInstructions.td10 // VOP3P Classes
18 // Non-packed instructions that use the VOP3P encoding.
19 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
DSIDefines.h38 VOP3P = 1 << 12, enumerator
DSIInstrInfo.h567 return MI.getDesc().TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
571 return get(Opcode).TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
DVOPInstructions.td134 let VOP3P = 1;
DAMDGPU.td284 "Has VOP3P packed instructions"
DSIInstructions.td1147 // VOP3P instructions, so it is turned into the bit op.
DSIInstrInfo.td1910 // Returns the assembly string for the inputs and outputs of a VOP3P
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp2821 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0) in validateLdsDirect()
3398 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P))) in validateVOP3Literal()