| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 106 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
167 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
352 setOperationAction(ISD::VSELECT, Ty, Legal); in addMSAIntType()
397 setOperationAction(ISD::VSELECT, Ty, Legal); in addMSAFloatType()
711 return DAG.getNode(ISD::VSELECT, SDLoc(N), Ty, Cond, IfSet, IfClr); in performORCombine()
1046 case ISD::VSELECT: in PerformDAGCombine()
1619 return DAG.getNode(ISD::VSELECT, DL, VecTy, in lowerINTRINSIC_WO_CHAIN()
1634 return DAG.getNode(ISD::VSELECT, DL, VecTy, in lowerINTRINSIC_WO_CHAIN()
1639 return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), Op->getOperand(3), in lowerINTRINSIC_WO_CHAIN()
1642 return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 490 VSELECT, enumerator
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| D | BasicTTIImpl.h | 846 ISD = ISD::VSELECT; in getCmpSelInstrCost()
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| D | SelectionDAG.h | 1019 auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 157 setOperationAction(ISD::VSELECT, T, Custom); in initializeHVXLowering()
204 setTargetDAGCombine(ISD::VSELECT); in initializeHVXLowering()
1552 case ISD::VSELECT: in LowerHvxOperation()
1599 if (Opc == ISD::VSELECT) { in PerformHvxDAGCombine()
1605 SDValue VSel = DCI.DAG.getNode(ISD::VSELECT, dl, ty(Op), C0, in PerformHvxDAGCombine()
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| D | HexagonISelLowering.cpp | 1576 setOperationAction(ISD::VSELECT, MVT::v4i8, Custom); in HexagonTargetLowering()
1577 setOperationAction(ISD::VSELECT, MVT::v2i16, Custom); in HexagonTargetLowering()
1625 setTargetDAGCombine(ISD::VSELECT); in HexagonTargetLowering()
2934 case ISD::VSELECT: return LowerVSELECT(Op, DAG); in LowerOperation()
3003 } else if (Opc == ISD::VSELECT) { in PerformDAGCombine()
3011 SDValue VSel = DCI.DAG.getNode(ISD::VSELECT, dl, ty(Op), C0, in PerformDAGCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 60 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break; in ScalarizeVectorResult()
589 case ISD::VSELECT: in ScalarizeVectorOperand()
826 case ISD::VSELECT: in SplitVectorResult()
1948 case ISD::VSELECT: in SplitVectorOperand()
2048 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1); in SplitVecOp_VSELECT()
2050 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1); in SplitVecOp_VSELECT()
2696 case ISD::VSELECT: in WidenVectorResult()
3906 if (N->getOpcode() != ISD::VSELECT) in WidenVSELECTAndMask()
4005 return DAG.getNode(ISD::VSELECT, SDLoc(N), VSelVT, Mask, VSelOp1, VSelOp2); in WidenVSELECTAndMask()
4200 case ISD::VSELECT: Res = WidenVecOp_VSELECT(N); break; in WidenVectorOperand()
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| D | LegalizeVectorOps.cpp | 401 case ISD::VSELECT: in LegalizeOp()
863 case ISD::VSELECT: in Expand()
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| D | SelectionDAGDumper.cpp | 278 case ISD::VSELECT: return "vselect"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 76 case ISD::VSELECT: Res = PromoteIntRes_VSELECT(N); break; in PromoteIntegerResult()
890 return DAG.getNode(ISD::VSELECT, SDLoc(N), in PromoteIntRes_VSELECT()
1266 case ISD::VSELECT: in PromoteIntegerOperand()
1519 if (N->getOpcode() == ISD::VSELECT) in PromoteIntOp_SELECT()
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| D | TargetLowering.cpp | 2411 case ISD::VSELECT: { in SimplifyDemandedVectorElts()
5191 if (isOperationLegalOrCustom(ISD::VSELECT, SETCCVT)) { in prepareUREMEqFold()
5196 return DAG.getNode(ISD::VSELECT, DL, SETCCVT, TautologicalInvertedChannels, in prepareUREMEqFold()
5439 !isOperationLegalOrCustom(ISD::VSELECT, VT)) in prepareSREMEqFold()
5466 DAG.getNode(ISD::VSELECT, DL, VT, DivisorIsIntMin, MaskedIsZero, Fold); in prepareSREMEqFold()
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| D | SelectionDAG.cpp | 2823 case ISD::VSELECT: in computeKnownBits()
3686 case ISD::VSELECT: in ComputeNumSignBits()
5592 case ISD::VSELECT: in getNode()
9297 case ISD::VSELECT: in UnrollVectorOp()
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| D | DAGCombiner.cpp | 1555 case ISD::VSELECT: return visitVSELECT(N); in visit()
9435 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in matchVSelectOpSizesWithSetCC()
9439 if (VSel.getOpcode() != ISD::VSELECT || !VSel.hasOneUse() || in matchVSelectOpSizesWithSetCC()
9462 return DAG.getNode(ISD::VSELECT, DL, VT, SetCC, CastA, CastB); in matchVSelectOpSizesWithSetCC()
20771 ISD::NodeType SelOpcode = VT.isVector() ? ISD::VSELECT : ISD::SELECT; in buildSqrtEstimateImpl()
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| D | SelectionDAGBuilder.cpp | 3301 ISD::VSELECT : ISD::SELECT; in visitSelect()
3320 !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT); in visitSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 167 for (auto Op : {ISD::VSELECT, ISD::SELECT_CC, ISD::SELECT}) { in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 847 setOperationAction(ISD::VSELECT, MVT::v4f32, Custom); in X86TargetLowering()
943 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
950 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1097 setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); in X86TargetLowering()
1346 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1356 setOperationAction(ISD::VSELECT, MVT::v32i8, Legal); in X86TargetLowering()
1435 setOperationAction(ISD::VSELECT, VT, Expand); in X86TargetLowering()
1617 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1736 setOperationAction(ISD::VSELECT, VT, Expand); in X86TargetLowering()
1807 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
[all …]
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| D | X86ISelDAGToDAG.cpp | 586 if (U == Root && Root->getOpcode() == ISD::VSELECT && in IsProfitableToFold()
4519 case ISD::VSELECT: { in Select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 628 setOperationAction(ISD::VSELECT, VT, Legal); in PPCTargetLowering()
986 setOperationAction(ISD::VSELECT, MVT::v4f64, Legal); in PPCTargetLowering()
1034 setOperationAction(ISD::VSELECT, MVT::v4f32, Legal); in PPCTargetLowering()
1072 setOperationAction(ISD::VSELECT, MVT::v4i1, Legal); in PPCTargetLowering()
1190 setTargetDAGCombine(ISD::VSELECT); in PPCTargetLowering()
14402 case ISD::VSELECT: in PerformDAGCombine()
15843 assert((N->getOpcode() == ISD::VSELECT) && "Need VSELECT node here"); in combineVSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 656 setTargetDAGCombine(ISD::VSELECT); in AArch64TargetLowering()
906 setOperationAction(ISD::VSELECT, VT, Expand); in addTypeForNEON()
6087 Estimate = DAG.getNode(VT.isVector() ? ISD::VSELECT : ISD::SELECT, DL, in getSqrtEstimate()
12207 return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC, in performVSelectCombine()
12585 case ISD::VSELECT: in PerformDAGCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 387 setOperationAction(ISD::VSELECT, VT, Expand); in AMDGPUTargetLowering()
427 setOperationAction(ISD::VSELECT, VT, Expand); in AMDGPUTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 556 def vselect : SDNode<"ISD::VSELECT" , SDTVSelect>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 188 setOperationAction(ISD::VSELECT, VT, Expand); in addTypeForNEON()
7805 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
9159 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 338 setOperationAction(ISD::VSELECT, VT, Legal); in SystemZTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 55749 /*121918*/ /*SwitchOpcode*/ 46|128,7/*942*/, TARGET_VAL(ISD::VSELECT),// ->122864
55761 /*121945*/ OPC_CheckOpcode, TARGET_VAL(ISD::VSELECT),
55807 /*122037*/ OPC_CheckOpcode, TARGET_VAL(ISD::VSELECT),
55853 /*122129*/ OPC_CheckOpcode, TARGET_VAL(ISD::VSELECT),
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenDAGISel.inc | 28372 /* 53590*/ /*SwitchOpcode*/ 64|128,2/*320*/, TARGET_VAL(ISD::VSELECT),// ->53914
|