Searched refs:VSRA (Results 1 – 12 of 12) sorted by relevance
402 X86_INTRINSIC_DATA(avx2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0),403 X86_INTRINSIC_DATA(avx2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0),861 X86_INTRINSIC_DATA(avx512_psra_d_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),862 X86_INTRINSIC_DATA(avx512_psra_q_128, INTR_TYPE_2OP, X86ISD::VSRA, 0),863 X86_INTRINSIC_DATA(avx512_psra_q_256, INTR_TYPE_2OP, X86ISD::VSRA, 0),864 X86_INTRINSIC_DATA(avx512_psra_q_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),865 X86_INTRINSIC_DATA(avx512_psra_w_512, INTR_TYPE_2OP, X86ISD::VSRA, 0),1062 X86_INTRINSIC_DATA(sse2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0),1063 X86_INTRINSIC_DATA(sse2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0),
309 VSHL, VSRL, VSRA, enumerator
228 def X86vsra : SDNode<"X86ISD::VSRA", X86vshiftuniform>;
23276 case X86ISD::VSRA: in getTargetVShiftUniformOpcode()23278 return IsVariable ? X86ISD::VSRA : X86ISD::VSRAI; in getTargetVShiftUniformOpcode()29721 case X86ISD::VSRA: return "X86ISD::VSRA"; in getTargetNodeName()35384 case X86ISD::VSRA: { in SimplifyDemandedVectorEltsForTargetNode()35395 UseOpc == X86ISD::VSRA) && in SimplifyDemandedVectorEltsForTargetNode()35687 case X86ISD::VSRA: in SimplifyDemandedVectorEltsForTargetNode()39607 assert((X86ISD::VSHL == N->getOpcode() || X86ISD::VSRA == N->getOpcode() || in combineVectorShiftVar()46030 case X86ISD::VSRA: in PerformDAGCombine()
570 (instregex "VABA", "VABAL", "VPADAL", "VRSRA", "VSRA", "VACGE", "VACGT",
1114 def : InstRW<[A57WriteVSRA, A57ReadVSRA], (instregex "VSRA", "VRSRA")>;
6004 // VSRA : Vector Shift Right and Accumulate
4600 enum NeonShiftOp { VSHL, VSHR, VSLI, VSRI, VSRA }; enumerator4650 case VSRA: { in EncodeNeonShiftOp()4732 emit(EncodeNeonShiftOp(VSRA, NeonDataTypeToSize(dt), NeonU(dt), NEON_D, in vsra()
46 (instregex "VSRA(B|H|W|D)$"),
533 V(vsra, VSRA, 0xE77E) /* type = VRR_C VECTOR SHIFT RIGHT ARITHMETIC */ \
789 def VSRA : BinaryVRRc<"vsra", 0xE77E, int_s390_vsra, v128b, v128b>;
14792 // FastEmit functions for X86ISD::VSRA.15221 case X86ISD::VSRA: return fastEmit_X86ISD_VSRA_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);