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/third_party/ffmpeg/libavcodec/
Dsimple_idct_template.c40 #undef W6
55 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
73 #define W6 8867 // 35468 macro
96 #define W6 17734 macro
165 a1 += (SUINT)W6 * row[2];
166 a2 -= (SUINT)W6 * row[2];
183 a0 += (SUINT) W4*row[4] + (SUINT)W6*row[6];
186 a3 += (SUINT) W4*row[4] - (SUINT)W6*row[6];
218 a1 += (SUINT) W6*col[8*2]; \
219 a2 += (SUINT)-W6*col[8*2]; \
[all …]
Dwmv2dsp.c32 #define W6 1108 /* 2048*sqrt (2)*cos (6*pi/16) */ macro
45 a2 = W2 * b[2] + W6 * b[6]; in wmv2_idct_row()
46 a6 = W6 * b[2] - W2 * b[6]; in wmv2_idct_row()
75 a2 = (W2 * b[8 * 2] + W6 * b[8 * 6] + 4) >> 3; in wmv2_idct_col()
76 a6 = (W6 * b[8 * 2] - W2 * b[8 * 6] + 4) >> 3; in wmv2_idct_col()
/third_party/ffmpeg/libavcodec/alpha/
Dsimple_idct_alpha.c40 #define W6 8867 macro
77 a1 += W6 * t; in idct_row()
78 a2 -= W6 * t; in idct_row()
94 a0 += W6 * t; in idct_row()
97 a3 -= W6 * t; in idct_row()
167 a1 += W6 * col[8 * 2]; in idct_col()
168 a2 -= W6 * col[8 * 2]; in idct_col()
180 a0 += W6 * col[8 * 6]; in idct_col()
183 a3 -= W6 * col[8 * 6]; in idct_col()
/third_party/ffmpeg/libavcodec/arm/
Dsimple_idct_arm.S34 #define W6 8867 macro
164 @@ a1 = a0 + W6 * row[2];
165 @@ a2 = a0 - W6 * row[2];
170 ldr r10, =W6 @ R10=W6
174 mul r11, r10, r4 @ R11=W6*ROWr16[2]
176 sub r3, r6, r11 @ R3=a0-W6*ROWr16[2] (a2)
182 add r2, r6, r11 @ R2=a0+W6*ROWr16[2] (a1)
189 @@ R5=b2, R6=a0, R7=b3, R8=W2, R9=W4, R10=W6, R11 (free),
208 @@ W6 alone is no more useful, save W2*ROWr16[6] in it instead
211 mulne r11, r10, r9 @ R11=W6*ROWr16[6]
[all …]
Dsimple_idct_armv6.S31 #define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ macro
37 #define W26 (W2 | (W6 << 16))
40 #define W46 (W4 | (W6 << 16))
Dsimple_idct_neon.S33 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
247 .short W1, W2, W3, W4, W5, W6, W7, W4c
Dsimple_idct_armv5te.S31 #define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */ macro
37 #define W26 (W2 | (W6 << 16))
/third_party/ffmpeg/libavcodec/mips/
Dsimple_idct_mmi.c36 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 macro
44 W4, W2, W4, W6,
46 W4, W6, -W4, -W2,
48 W4, -W6, -W4, W2,
50 W4, -W2, W4, -W6,
Dwmv2dsp_mmi.c34 #define W6 1108 /* 2048*sqrt (2)*cos (6*pi/16) */ macro
45 a2 = W2 * b[2] + W6 * b[6]; in wmv2_idct_row_mmi()
49 a6 = W6 * b[2] - W2 * b[6]; in wmv2_idct_row_mmi()
75 a2 = (W2 * b[16] + W6 * b[48] + 4) >> 3; in wmv2_idct_col_mmi()
79 a6 = (W6 * b[16] - W2 * b[48] + 4) >> 3; in wmv2_idct_col_mmi()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td92 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
102 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
141 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
144 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
209 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
214 [W0, W1, W2, W3, W4, W5, W6]>>>,
219 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
310 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
313 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
DAArch64RegisterInfo.td66 def W6 : AArch64Reg<6, "w6" >, DwarfRegNum<[6]>;
101 def X6 : AArch64Reg<6, "x6", [W6]>, DwarfRegAlias<W6>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonCallingConv.td89 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
103 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
DHexagonRegisterInfo.cpp74 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
DHexagonRegisterInfo.td197 def W6 : Rd<12, "v13:12", [V12, V13]>, DwarfRegNum<[111]>;
214 def VQ3 : Rd<12, "v15:12", [W6, W7]>, DwarfRegNum<[255]>;
/third_party/ffmpeg/libavcodec/x86/
Dsimple_idct10_template.asm80 ; a1 += W6 * row[2];
81 ; a2 -= W6 * row[2];
114 ; a0 += W4*row[4] + W6*row[6]; i.e. -1*row[4]
117 ; a3 += W4*row[4] - W6*row[6]; i.e. -1*row[4]
Dsimple_idct10.asm55 %define W6sh2 8867 ; W6 = 35468 = 8867<<2
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc216 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
258 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
460 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
477 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6
502 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1055 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1071 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1196 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
1212 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
DAArch64GenRegisterInfo.inc211 W6 = 191,
2220 { AArch64::W6 },
2320 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
2340 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
2350 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
2360 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
2370 …AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64…
3555 { 6U, AArch64::W6 },
3672 { 6U, AArch64::W6 },
3972 { AArch64::W6, 6U },
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/
DBPFDisassembler.cpp113 BPF::W6, BPF::W7, BPF::W8, BPF::W9, BPF::W10, BPF::W11};
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h37 case AArch64::X6: return AArch64::W6; in getWRegFromXReg()
77 case AArch64::W6: return AArch64::X6; in getXRegFromWReg()
/third_party/ffmpeg/libavcodec/ppc/
Dfdctdsp.c54 #define W6 (M_SQRT2 * (C1 + C3 + C5 - C7)) macro
63 { W4, W5, W6, W7 },
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCTargetDesc.cpp71 {codeview::RegisterId::ARM64_W6, AArch64::W6}, in initLLVMToCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenRegisterInfo.inc373 W6 = 353,
1917 …Mips::W0, Mips::W1, Mips::W2, Mips::W3, Mips::W4, Mips::W5, Mips::W6, Mips::W7, Mips::W8, Mips::W9…
2557 …Mips::W0, Mips::W1, Mips::W2, Mips::W3, Mips::W4, Mips::W5, Mips::W6, Mips::W7, Mips::W8, Mips::W9…
2567 …Mips::W0, Mips::W1, Mips::W2, Mips::W3, Mips::W4, Mips::W5, Mips::W6, Mips::W7, Mips::W8, Mips::W9…
2577 …Mips::W0, Mips::W1, Mips::W2, Mips::W3, Mips::W4, Mips::W5, Mips::W6, Mips::W7, Mips::W8, Mips::W9…
2587 …Mips::W0, Mips::W1, Mips::W2, Mips::W3, Mips::W4, Mips::W5, Mips::W6, Mips::W7, Mips::W8, Mips::W9…
2597 …Mips::W0, Mips::W2, Mips::W4, Mips::W6, Mips::W8, Mips::W10, Mips::W12, Mips::W14, Mips::W16, Mips…
3015 { Mips::W6, 38U },
3219 { Mips::W6, 38U },
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/
DHexagonDisassembler.cpp607 Hexagon::W4, Hexagon::W5, Hexagon::W6, Hexagon::W7, in DecodeHvxWRRegisterClass()
/third_party/python/Doc/library/
Dlogging.handlers.rst386 | ``'W0'-'W6'`` | Weekday (0=Monday) | Used to compute initial |
395 Tuesday, and so on up to 'W6' for Sunday. In this case, the value passed for

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