| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
239 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
[all …]
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| D | X86CallingConv.cpp | 80 static const MCPhysReg RegListXMM[] = {X86::XMM0, X86::XMM1, X86::XMM2, in CC_X86_VectorCallGetSSEs()
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| D | X86CallLowering.cpp | 165 static const MCPhysReg XMMArgRegs[] = {X86::XMM0, X86::XMM1, X86::XMM2, in assignArg()
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| D | X86RegisterInfo.td | 213 def XMM1: X86Reg<"xmm1", 1>, DwarfRegNum<[18, 22, 22]>;
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| D | X86FastISel.cpp | 3125 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerArguments()
3462 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerCall()
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| D | X86InstrCompiler.td | 477 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
497 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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| D | X86ISelLowering.cpp | 2727 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) { in LowerReturn()
3022 if (VA.getLocReg() == X86::XMM1) in LowerCallResult()
3030 if (VA.getLocReg() == X86::XMM1) in LowerCallResult()
3336 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in get64BitArgumentXMMs()
4009 case X86::XMM1: ShadowReg = X86::RDX; break; in LowerCall()
4066 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in LowerCall()
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| /third_party/mesa3d/src/mesa/x86/ |
| D | common_x86_asm.S | 203 MOVUPS ( REGIND( ESP ), XMM1 )
205 DIVPS ( XMM0, XMM1 )
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| D | assyntax.h | 225 #define XMM1 %xmm1 macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenCallingConv.inc | 232 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
438 X86::XMM0, X86::XMM1, X86::XMM2
603 X86::XMM0, X86::XMM1, X86::XMM2
880 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
904 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1173 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
1237 X86::XMM0, X86::XMM1, X86::XMM2
1550 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1688 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
1952 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
[all …]
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| D | X86GenRegisterInfo.inc | 164 XMM1 = 144,
1280 { X86::XMM1 },
1586 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1636 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1956 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1986 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2426 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2436 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2733 { 18U, X86::XMM1 },
2810 { 22U, X86::XMM1 },
[all …]
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| D | X86GenInstrInfo.inc | 16673 …6::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XM…
16674 …6::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XM…
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| D | X86GenAsmMatcher.inc | 7205 case X86::XMM1: OpKind = MCK_FR32; break;
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| /third_party/libffi/src/x86/ |
| D | win64_intel.S | 69 movsd XMM1, qword ptr [RSP + 8]; movsd 8(%rsp), %xmm1
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZCallingConv.td | 74 // Pass in STG registers: XMM1, ..., XMM6
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 220 ENTRY(XMM1) \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 135 {codeview::RegisterId::XMM1, X86::XMM1}, in initLLVMToSEHAndCVRegMapping()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 152 CV_REGISTER(XMM1, 155)
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