Searched refs:base_op (Results 1 – 3 of 3) sorted by relevance
| /third_party/mesa3d/src/amd/common/ |
| D | ac_nir.c | 55 nir_ssa_def *base_op = nir_imul_imm(b, base_stride, mapped_driver_location); in ac_nir_calc_io_offset() local
66 return nir_iadd_imm_nuw(b, nir_iadd_nuw(b, base_op, offset_op), const_op); in ac_nir_calc_io_offset()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 690 class SOPK_SCC <string opName, string base_op, bit isSignExt> : SOPK_Pseudo <
697 SOPKInstTable<1, base_op>{
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| /third_party/mesa3d/src/mesa/main/ |
| D | dlist.c | 6120 unsigned base_op; in save_Attr32bit() local
6129 base_op = OPCODE_ATTR_1F_ARB; in save_Attr32bit()
6132 base_op = OPCODE_ATTR_1F_NV; in save_Attr32bit()
6135 base_op = OPCODE_ATTR_1I; in save_Attr32bit()
6139 n = alloc_instruction(ctx, base_op + size - 1, 1 + size); in save_Attr32bit()
6153 if (base_op == OPCODE_ATTR_1F_NV) { in save_Attr32bit()
6191 unsigned base_op; in save_Attr64bit() local
6195 base_op = OPCODE_ATTR_1D; in save_Attr64bit()
6197 base_op = OPCODE_ATTR_1UI64; in save_Attr64bit()
6202 n = alloc_instruction(ctx, base_op + size - 1, 1 + size * 2); in save_Attr64bit()
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