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Searched refs:bitsLT (Results 1 – 25 of 25) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMSelectionDAGInfo.cpp92 else if (Src.getValueType().bitsLT(MVT::i32)) in EmitSpecializedLibcall()
DARMISelLowering.cpp7451 if (SrcEltTy.bitsLT(SmallestEltTy)) in ReconstructShuffle()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.h243 bool bitsLT(EVT VT) const { in bitsLT() function
DTargetLowering.h3727 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp976 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT()
1432 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown()
1490 if (VT.bitsLT(MinVT)) in GetReturnInfo()
DCodeGenPrepare.cpp1170 if (SrcVT.bitsLT(DstVT)) return false; in OptimizeNoopCopyExpression()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp4347 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in foldCONCAT_VECTORS()
4579 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4606 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4625 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4644 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4682 .bitsLT(VT.getScalarType())) in getNode()
4933 if (LegalSVT.bitsLT(SVT)) in FoldConstantArithmetic()
5020 if (LegalSVT.bitsLT(VT.getScalarType())) in FoldConstantVectorArithmetic()
6231 if (VT.bitsLT(LargestVT)) { in getMemsetStores()
6832 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && in getLoad()
[all …]
DLegalizeTypesGeneric.cpp219 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); in ExpandRes_EXTRACT_VECTOR_ELT()
DFastISel.cpp518 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
1902 if (DstVT.bitsLT(SrcVT)) in selectOperator()
DLegalizeDAG.cpp1421 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) { in ExpandVectorBuildThroughStack()
3047 if (NewEltVT.bitsLT(EltVT)) { in ExpandNode()
4550 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
4583 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
4629 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
DLegalizeVectorTypes.cpp474 if (BoolVT.bitsLT(CondVT)) in ScalarizeVecRes_VSELECT()
1955 if (N->getValueType(0).bitsLT( in SplitVectorOperand()
2214 if (N->getValueType(0).bitsLT(EltVT)) { in SplitVecOp_EXTRACT_VECTOR_ELT()
5152 assert(StVT.bitsLT(ValOp.getValueType())); in GenWidenVectorTruncStores()
DDAGCombiner.cpp9940 if (SrcVT.bitsLT(VT) && VT.isVector()) { in visitZERO_EXTEND()
10321 EVT MinAssertVT = AssertVT.bitsLT(BigA_AssertVT) ? AssertVT : BigA_AssertVT; in visitAssertExt()
10340 if (AssertVT.bitsLT(BigA_AssertVT)) { in visitAssertExt()
10581 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG()
10752 if (N0.getOperand(0).getValueType().bitsLT(VT)) in visitTRUNCATE()
13297 if (VT.bitsLT(In.getValueType())) in visitFP_EXTEND()
17004 if (ResultVT.bitsLT(VecEltVT)) in scalarizeExtractedVectorLoad()
17225 if (ScalarVT.bitsLT(LVT) && !TLI.isTruncateFree(LVT, ScalarVT)) in visitEXTRACT_VECTOR_ELT()
18859 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in combineShuffleOfScalars()
19348 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE()
[all …]
DSelectionDAGBuilder.cpp296 ValueVT.bitsLT(PartEVT)) { in getCopyFromParts()
309 if (ValueVT.bitsLT(PartEVT)) { in getCopyFromParts()
323 if (ValueVT.bitsLT(Val.getValueType())) in getCopyFromParts()
334 ValueVT.bitsLT(PartEVT)) { in getCopyFromParts()
DTargetLowering.cpp3521 else if (Op0.getValueType().bitsLT(VT)) in SimplifySetCC()
7078 if (VT.bitsLT(MVT::i32)) { in lowerCmpEqZeroToCtlzSrl()
DLegalizeIntegerTypes.cpp4258 if (N->getOperand(i).getValueType().bitsLT(NOutVTElem)) in PromoteIntRes_BUILD_VECTOR()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h873 bool bitsLT(MVT VT) const { in bitsLT() function
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1329 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
1447 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
1673 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
DSIISelLowering.cpp1454 VT.bitsLT(MemVT)) { in convertArgType()
4350 if (NewVT.bitsLT(MVT::i32)) { in ReplaceNodeResults()
7257 if (VT.bitsLT(Op.getValueType())) in getLoadExtOrTrunc()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips64InstrInfo.td71 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32);
DMipsISelLowering.cpp3999 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86FastISel.cpp3648 if (DstVT.bitsLT(SrcVT)) in fastSelectInstruction()
DX86ISelLowering.cpp2892 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
20485 if (Sign.getSimpleValueType().bitsLT(VT)) in LowerFCOPYSIGN()
26485 else if (EltVT.bitsLT(MVT::i32)) in LowerScalarVariableShift()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp5008 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
DAArch64ISelLowering.cpp5090 if (SrcVT.bitsLT(VT)) in LowerFCOPYSIGN()
6609 if (SrcEltTy.bitsLT(SmallestEltTy)) { in ReconstructShuffle()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc30598 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32);