Home
last modified time | relevance | path

Searched refs:bset (Results 1 – 23 of 23) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/virgl/
Dvirgl_screen.c96 return vscreen->caps.caps.v1.bset.occlusion_query; in virgl_get_param()
99 return vscreen->caps.caps.v1.bset.mirror_clamp; in virgl_get_param()
117 return vscreen->caps.caps.v1.bset.indep_blend_enable; in virgl_get_param()
119 return vscreen->caps.caps.v1.bset.indep_blend_func; in virgl_get_param()
125 return vscreen->caps.caps.v1.bset.fragment_coord_conventions; in virgl_get_param()
127 if (vscreen->caps.caps.v1.bset.depth_clip_disable) in virgl_get_param()
141 return vscreen->caps.caps.v1.bset.primitive_restart; in virgl_get_param()
143 return vscreen->caps.caps.v1.bset.shader_stencil_export; in virgl_get_param()
148 return vscreen->caps.caps.v1.bset.seamless_cube_map; in virgl_get_param()
150 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture; in virgl_get_param()
[all …]
Dvirgl_tgsi.c441 transform.cull_enabled = vscreen->caps.caps.v1.bset.has_cull; in virgl_tgsi_transform()
Dvirgl_context.c468 virgl_screen(ctx->screen)->caps.caps.v1.bset.depth_clip_disable); in virgl_create_rasterizer_state()
1177 if (!rs->caps.caps.v1.bset.has_tessellation_shaders) in virgl_set_tess_state()
/third_party/mesa3d/src/panfrost/midgard/
Dmir_promote_uniforms.c241 BITSET_WORD *bset = calloc(BITSET_WORDS(ctx->temp_count), sizeof(BITSET_WORD)); in mir_special_indices() local
257 BITSET_SET(bset, idx); in mir_special_indices()
261 return bset; in mir_special_indices()
/third_party/mesa3d/src/virtio/virtio-gpu/
Dvirgl_hw.h535 struct virgl_caps_bool_set1 bset; member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrAliases.td413 // bset reg_or_imm, rd -> or rd,reg_or_imm,rd
414 def : InstAlias<"bset $rs2, $rd", (ORrr IntRegs:$rd, IntRegs:$rd, IntRegs:$rs2), 0>;
415 def : InstAlias<"bset $simm13, $rd", (ORri IntRegs:$rd, IntRegs:$rd, i32imm:$simm13), 0>;
/third_party/skia/third_party/externals/icu/source/i18n/
DdecNumber.cpp5651 decContext aset, bset; /* working contexts */ local
5772 bset=aset;
5773 bset.emax=DEC_MAX_MATH*2; /* use double bounds for the */
5774 bset.emin=-DEC_MAX_MATH*2; /* adjustment calculation */
5782 bset.digits=pp+rhs->digits; /* wider context */
5794 decExpOp(b, a, &bset, &ignore); /* b=exp(-a) */
5797 decMultiplyOp(b, b, rhs, &bset, &ignore); /* b=b*rhs */
5798 decAddOp(b, b, &numone, &bset, DECNEG, &ignore); /* b=b-1 */
5828 bset.digits=pp+rhs->digits; /* wider context */
/third_party/icu/icu4c/source/i18n/
DdecNumber.cpp5651 decContext aset, bset; /* working contexts */ local
5772 bset=aset;
5773 bset.emax=DEC_MAX_MATH*2; /* use double bounds for the */
5774 bset.emin=-DEC_MAX_MATH*2; /* adjustment calculation */
5782 bset.digits=pp+rhs->digits; /* wider context */
5794 decExpOp(b, a, &bset, &ignore); /* b=exp(-a) */
5797 decMultiplyOp(b, b, rhs, &bset, &ignore); /* b=b*rhs */
5798 decAddOp(b, b, &numone, &bset, DECNEG, &ignore); /* b=b-1 */
5828 bset.digits=pp+rhs->digits; /* wider context */
/third_party/node/deps/icu-small/source/i18n/
DdecNumber.cpp5651 decContext aset, bset; /* working contexts */ local
5772 bset=aset;
5773 bset.emax=DEC_MAX_MATH*2; /* use double bounds for the */
5774 bset.emin=-DEC_MAX_MATH*2; /* adjustment calculation */
5782 bset.digits=pp+rhs->digits; /* wider context */
5794 decExpOp(b, a, &bset, &ignore); /* b=exp(-a) */
5797 decMultiplyOp(b, b, rhs, &bset, &ignore); /* b=b*rhs */
5798 decAddOp(b, b, &numone, &bset, DECNEG, &ignore); /* b=b-1 */
5828 bset.digits=pp+rhs->digits; /* wider context */
/third_party/mesa3d/src/nouveau/codegen/
Dnv50_ir_peephole.cpp2118 Instruction *bset = cloneShallow(func, insn); in handleCVT_NEG() local
2119 bset->dType = TYPE_U32; in handleCVT_NEG()
2120 bset->setDef(0, cvt->getDef(0)); in handleCVT_NEG()
2121 cvt->bb->insertAfter(cvt, bset); in handleCVT_NEG()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td292 // bset.[bhwd], bclr.[bhwd], bneg.[bhwd], bsel_v, bseli_b
DMipsMSAInstrInfo.td1767 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", vbset_b, MSA128BOpnd>;
1768 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", vbset_h, MSA128HOpnd>;
1769 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", vbset_w, MSA128WOpnd>;
1770 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", vbset_d, MSA128DOpnd>;
DMipsScheduleGeneric.td1440 // bset.[bhwd], bclr.[bhwd], bneg.[bhwd], bsel_v, bseli_b
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4957 "set.b\006bset.d\006bset.h\006bset.w\007bseti.b\007bseti.d\007bseti.h\007"
5848 …{ 1621 /* bset.b */, Mips::BSET_B, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, AMF…
5849 …{ 1628 /* bset.d */, Mips::BSET_D, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, AMF…
5850 …{ 1635 /* bset.h */, Mips::BSET_H, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, AMF…
5851 …{ 1642 /* bset.w */, Mips::BSET_W, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, AMF…
8871 { 1621 /* bset.b */, 7 /* 0, 1, 2 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
8872 { 1628 /* bset.d */, 7 /* 0, 1, 2 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
8873 { 1635 /* bset.h */, 7 /* 0, 1, 2 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
8874 { 1642 /* bset.w */, 7 /* 0, 1, 2 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRInstrInfo.td1776 "bset\t$s",
/third_party/node/deps/v8/src/codegen/mips/
Dassembler-mips.cc3157 V(bset, BSET) \
/third_party/node/deps/v8/src/codegen/mips64/
Dassembler-mips64.cc3365 V(bset, BSET) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen2300 mips_bset_b, // llvm.mips.bset.b
2301 mips_bset_d, // llvm.mips.bset.d
2302 mips_bset_h, // llvm.mips.bset.h
2303 mips_bset_w, // llvm.mips.bset.w
8324 "llvm.mips.bset.b",
8325 "llvm.mips.bset.d",
8326 "llvm.mips.bset.h",
8327 "llvm.mips.bset.w",
16209 1, // llvm.mips.bset.b
16210 1, // llvm.mips.bset.d
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen2306 mips_bset_b, // llvm.mips.bset.b
2307 mips_bset_d, // llvm.mips.bset.d
2308 mips_bset_h, // llvm.mips.bset.h
2309 mips_bset_w, // llvm.mips.bset.w
8364 "llvm.mips.bset.b",
8365 "llvm.mips.bset.d",
8366 "llvm.mips.bset.h",
8367 "llvm.mips.bset.w",
16304 1, // llvm.mips.bset.b
16305 1, // llvm.mips.bset.d
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen2306 mips_bset_b, // llvm.mips.bset.b
2307 mips_bset_d, // llvm.mips.bset.d
2308 mips_bset_h, // llvm.mips.bset.h
2309 mips_bset_w, // llvm.mips.bset.w
8364 "llvm.mips.bset.b",
8365 "llvm.mips.bset.d",
8366 "llvm.mips.bset.h",
8367 "llvm.mips.bset.w",
16304 1, // llvm.mips.bset.b
16305 1, // llvm.mips.bset.d
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen2306 mips_bset_b, // llvm.mips.bset.b
2307 mips_bset_d, // llvm.mips.bset.d
2308 mips_bset_h, // llvm.mips.bset.h
2309 mips_bset_w, // llvm.mips.bset.w
8364 "llvm.mips.bset.b",
8365 "llvm.mips.bset.d",
8366 "llvm.mips.bset.h",
8367 "llvm.mips.bset.w",
16304 1, // llvm.mips.bset.b
16305 1, // llvm.mips.bset.d
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen2306 mips_bset_b, // llvm.mips.bset.b
2307 mips_bset_d, // llvm.mips.bset.d
2308 mips_bset_h, // llvm.mips.bset.h
2309 mips_bset_w, // llvm.mips.bset.w
8364 "llvm.mips.bset.b",
8365 "llvm.mips.bset.d",
8366 "llvm.mips.bset.h",
8367 "llvm.mips.bset.w",
16304 1, // llvm.mips.bset.b
16305 1, // llvm.mips.bset.d
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc3787 "llvm.mips.bset.b",
3788 "llvm.mips.bset.d",
3789 "llvm.mips.bset.h",
3790 "llvm.mips.bset.w",
13920 1, // llvm.mips.bset.b
13921 1, // llvm.mips.bset.d
13922 1, // llvm.mips.bset.h
13923 1, // llvm.mips.bset.w