| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_gather_xfb_info.c | 151 output->component_mask = comp_mask & 0xf; in add_var_xfb_outputs()
154 *offset += util_bitcount(output->component_mask) * 4; in add_var_xfb_outputs()
281 assert(xfb->outputs[i].component_mask != 0); in nir_gather_xfb_info_with_varyings()
282 unsigned slots = util_bitcount(xfb->outputs[i].component_mask); in nir_gather_xfb_info_with_varyings()
295 if (!a->component_mask) in get_xfb_out_sort_index()
358 out.component_mask = in nir_gather_xfb_info_from_intrinsics()
374 assert(!(out.component_mask & BITFIELD_MASK(out.component_offset))); in nir_gather_xfb_info_from_intrinsics()
394 if (!cur->component_mask) in nir_gather_xfb_info_from_intrinsics()
402 if (outputs[j].component_mask && in nir_gather_xfb_info_from_intrinsics()
408 unsigned merged_mask = cur->component_mask | outputs[j].component_mask; in nir_gather_xfb_info_from_intrinsics()
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| D | nir_xfb_info.h | 45 uint8_t component_mask; member
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| D | nir_lower_tex.c | 751 unsigned component_mask; in lower_gradient() local
754 component_mask = 7; in lower_gradient()
757 component_mask = 1; in lower_gradient()
760 component_mask = 3; in lower_gradient()
766 component_mask); in lower_gradient()
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| D | nir_validate.c | 827 unsigned component_mask = BITFIELD_MASK(instr->num_components); in validate_intrinsic_instr() local
828 validate_assert(state, (nir_intrinsic_write_mask(instr) & ~component_mask) == 0); in validate_intrinsic_instr()
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| D | nir_lower_io.c | 3043 unsigned xfb_mask = writemask & out->component_mask; in nir_io_add_intrinsic_xfb_info()
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| /third_party/mesa3d/src/compiler/glsl/ |
| D | gl_nir_link_xfb.c | 174 output->NumComponents = util_bitcount(xfb_output->component_mask); in gl_nir_link_assign_xfb_resources()
221 xfb->outputs[i].component_mask = in gl_to_nir_xfb_info()
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| D | linker.cpp | 2958 unsigned component_mask = in assign_attribute_or_color_locations() local
2961 if (assigned_component_mask & component_mask) { in assign_attribute_or_color_locations()
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_helpers.c | 45 so->output[i].num_components = util_bitcount(info->outputs[i].component_mask); in nir_gather_stream_output_info()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_shader_info.h | 93 uint8_t component_mask; member
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| D | aco_instruction_selection.cpp | 11461 unsigned writemask = output->component_mask & ctx->outputs.mask[loc]; in emit_stream_output()
11471 unsigned offset = output->offset + (start - (ffs(output->component_mask) - 1)) * 4; in emit_stream_output()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | genX_pipeline.c | 1308 uint8_t component_mask = output->component_mask; in emit_3dstate_streamout() local
1317 component_mask = 1 << 0; // SO_DECL_COMPMASK_X in emit_3dstate_streamout()
1320 component_mask = 1 << 1; // SO_DECL_COMPMASK_Y in emit_3dstate_streamout()
1323 component_mask = 1 << 2; // SO_DECL_COMPMASK_Z in emit_3dstate_streamout()
1325 component_mask = 1 << 3; // SO_DECL_COMPMASK_W in emit_3dstate_streamout()
1329 __builtin_popcount(component_mask) * 4; in emit_3dstate_streamout()
1339 .ComponentMask = component_mask, in emit_3dstate_streamout()
1345 .ComponentMask = component_mask, in emit_3dstate_streamout()
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_nir_lower_blend.c | 566 unsigned component_mask = BITFIELD_MASK(blend_output->num_components); in vc4_nir_lower_blend_instr() local
567 nir_intrinsic_set_write_mask(intr, component_mask); in vc4_nir_lower_blend_instr()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_shader_info.c | 418 output->component_mask = xfb->outputs[i].component_mask; in gather_xfb_info()
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| D | radv_shader.h | 178 uint8_t component_mask; member
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| D | radv_nir_to_llvm.c | 755 unsigned num_comps = util_bitcount(output->component_mask); in radv_emit_stream_output()
766 start = ffs(output->component_mask) - 1; in radv_emit_stream_output()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 284 if (c->tmu.flush[i].component_mask > 0) { in ntq_flush_tmu()
289 if (c->tmu.flush[i].component_mask & (1 << j)) { in ntq_flush_tmu()
313 uint32_t component_mask) in ntq_add_pending_tmu_flush() argument
315 const uint32_t num_components = util_bitcount(component_mask); in ntq_add_pending_tmu_flush()
325 c->tmu.flush[c->tmu.flush_count].component_mask = component_mask; in ntq_add_pending_tmu_flush()
707 const uint32_t component_mask = in ntq_emit_tmu_general() local
710 component_mask); in ntq_emit_tmu_general()
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| D | v3d_compiler.h | 645 uint8_t component_mask; member
1139 uint32_t component_mask);
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| /third_party/mesa3d/src/gallium/frontends/lavapipe/ |
| D | lvp_pipeline.c | 605 …eline->stream_output.output[i].num_components = util_bitcount(xfb_info->outputs[i].component_mask); in lvp_pipeline_xfb_init()
606 … pipeline->stream_output.output[i].start_component = ffs(xfb_info->outputs[i].component_mask) - 1; in lvp_pipeline_xfb_init()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_shader.c | 712 util_bitcount(xfb->outputs[i].component_mask); in tu_gather_xfb_info()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_nir_lower_ngg.c | 2571 unsigned component_mask = s->output_info[slot].components_mask; in ms_emit_arrayed_outputs() local
2573 while (component_mask) { in ms_emit_arrayed_outputs()
2575 u_bit_scan_consecutive_range(&component_mask, &start_comp, &num_components); in ms_emit_arrayed_outputs()
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