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Searched refs:cur_reg (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/lima/ir/gp/
Dregalloc.c176 BITSET_FOREACH_SET(live_reg, ctx->live, ctx->comp->cur_reg) { in add_all_interferences()
189 BITSET_FOREACH_SET(live_idx, live_reg, ctx->comp->cur_reg) { in print_liveness()
270 for (int i = 0; i < ctx->comp->cur_reg; i++) { in do_regalloc()
283 if (ctx->stack_size < ctx->comp->cur_reg) { in do_regalloc()
291 for (int reg = 0; reg < ctx->comp->cur_reg; reg++) { in do_regalloc()
309 for (int i = ctx->comp->cur_reg - 1; i >= 0; i--) { in do_regalloc()
367 BITSET_FOREACH_SET(reg_idx, block->live_out, ctx->comp->cur_reg) { in assign_regs()
405 unsigned cur_reg = (reg_base + reg_offset) % (GPIR_PHYSICAL_REG_NUM + GPIR_VALUE_REG_NUM); in find_free_value_reg() local
406 if (!ctx->live[cur_reg]) { in find_free_value_reg()
407 reg = cur_reg; in find_free_value_reg()
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Doptimize.c181 BITSET_WORD *regs = rzalloc_array(comp, BITSET_WORD, comp->cur_reg); in dead_code_eliminate()
Dreduce_scheduler.c212 gpir_node **last_written = calloc(comp->cur_reg, sizeof(gpir_node *)); in add_false_dependencies()
Dgpir.h415 int cur_reg; member
Dnir.c36 reg->index = comp->cur_reg++; in gpir_create_reg()
/third_party/node/deps/v8/src/compiler/backend/
Dregister-allocator.cc3163 for (int cur_reg = 0; cur_reg < num_registers(); ++cur_reg) { in AssignRegisterOnReload() local
3165 cur_reg != reg) { in AssignRegisterOnReload()
3168 for (const LiveRange* cur_inactive : inactive_live_ranges(cur_reg)) { in AssignRegisterOnReload()
3170 !data()->config()->AreAliases(cur_inactive->representation(), cur_reg, in AssignRegisterOnReload()
4043 int cur_reg = cur_active->assigned_register(); in FindFreeRegistersForRange() local
4045 positions[cur_reg] = LifetimePosition::GapFromInstructionIndex(0); in FindFreeRegistersForRange()
4047 RegisterName(cur_reg), in FindFreeRegistersForRange()
4053 cur_active->representation(), cur_reg, rep, &alias_base_index); in FindFreeRegistersForRange()
4062 for (int cur_reg = 0; cur_reg < num_regs; ++cur_reg) { in FindFreeRegistersForRange() local
4063 for (LiveRange* cur_inactive : inactive_live_ranges(cur_reg)) { in FindFreeRegistersForRange()
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/third_party/mesa3d/src/freedreno/ir3/
Dir3_ra.c1218 struct ir3_register *cur_reg = in compress_regs_left() local
1223 if (process_dst && !is_early_clobber(cur_reg)) { in compress_regs_left()
1238 if (!(cur_reg->flags & IR3_REG_HALF)) in compress_regs_left()
1241 d("pushing reg %u physreg %u\n", cur_reg->name, physreg); in compress_regs_left()
1243 unsigned interval_size = reg_size(cur_reg); in compress_regs_left()
1245 reg_file_size(file, cur_reg)) { in compress_regs_left()
1247 cur_reg->name); in compress_regs_left()
1253 if (cur_reg == reg) { in compress_regs_left()
1256 struct ra_interval *interval = &ctx->intervals[cur_reg->name]; in compress_regs_left()
1268 if (process_dst && !is_early_clobber(cur_reg)) { in compress_regs_left()