| /third_party/mesa3d/src/amd/common/ |
| D | ac_surface.c | 151 return (!surf->u.gfx9.color.dcc.independent_64B_blocks && in ac_surface_supports_dcc_image_stores()
152 surf->u.gfx9.color.dcc.independent_128B_blocks && in ac_surface_supports_dcc_image_stores()
153 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_128B) || in ac_surface_supports_dcc_image_stores()
155 surf->u.gfx9.color.dcc.independent_64B_blocks && in ac_surface_supports_dcc_image_stores()
156 surf->u.gfx9.color.dcc.independent_128B_blocks && in ac_surface_supports_dcc_image_stores()
157 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B); in ac_surface_supports_dcc_image_stores()
186 surf->u.gfx9.color.dcc.independent_64B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier); in ac_modifier_fill_dcc_params()
187 surf->u.gfx9.color.dcc.independent_128B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier); in ac_modifier_fill_dcc_params()
188 …surf->u.gfx9.color.dcc.max_compressed_block_size = AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modif… in ac_modifier_fill_dcc_params()
239 if (!options->dcc) in ac_is_modifier_supported()
[all …]
|
| D | ac_surface_modifier_test.c | 86 din.dccKeyFlags.pipeAligned = surf->u.gfx9.color.dcc.pipe_aligned; in get_addr_from_coord_base()
87 din.dccKeyFlags.rbAligned = surf->u.gfx9.color.dcc.rb_aligned; in get_addr_from_coord_base()
148 surf->u.gfx9.color.dcc.rb_aligned, in generate_hash()
149 surf->u.gfx9.color.dcc.pipe_aligned); in generate_hash()
347 .dcc = true, in run_modifier_test()
|
| D | ac_surface.h | 260 struct gfx9_surf_meta_flags dcc; /* metadata of color */ member
443 bool dcc; /* Whether to allow DCC. */ member
|
| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_sdma_copy_image.c | 126 bool dcc = radv_dcc_enabled(image, 0) && is_v5; in radv_sdma_v4_v5_copy_image_to_buffer() local
134 align(15 + dcc * 3, ib_pad_dw_mask + 1)); in radv_sdma_v4_v5_copy_image_to_buffer()
140 dcc << 19 | (is_v5 ? 0 : 0 /* tiled->buffer.b.b.last_level */) << 20 | in radv_sdma_v4_v5_copy_image_to_buffer()
162 if (dcc) { in radv_sdma_v4_v5_copy_image_to_buffer()
174 image->planes[0].surface.u.gfx9.color.dcc.max_compressed_block_size << 24 | in radv_sdma_v4_v5_copy_image_to_buffer()
176 image->planes[0].surface.u.gfx9.color.dcc.pipe_aligned << 31); in radv_sdma_v4_v5_copy_image_to_buffer()
|
| D | radv_image.c | 833 meta = plane->surface.u.gfx9.color.dcc; in si_set_mutable_tex_desc_fields()
864 meta = plane->surface.u.gfx9.color.dcc; in si_set_mutable_tex_desc_fields()
1049 image->planes[0].surface.u.gfx9.color.dcc.max_compressed_block_size) | in gfx10_make_texture_descriptor()
1383 … metadata->u.gfx9.dcc_independent_64b_blocks = surface->u.gfx9.color.dcc.independent_64B_blocks; in radv_init_metadata()
1384 … metadata->u.gfx9.dcc_independent_128b_blocks = surface->u.gfx9.color.dcc.independent_128B_blocks; in radv_init_metadata()
1386 surface->u.gfx9.color.dcc.max_compressed_block_size; in radv_init_metadata()
1789 .dcc = true, in radv_select_modifier()
|
| D | radv_device.c | 6199 iview->image->planes[0].surface.u.gfx9.color.dcc.max_compressed_block_size; in radv_init_dcc_control_reg()
6200 …independent_128b_blocks = iview->image->planes[0].surface.u.gfx9.color.dcc.independent_128B_blocks; in radv_init_dcc_control_reg()
6201 … independent_64b_blocks = iview->image->planes[0].surface.u.gfx9.color.dcc.independent_64B_blocks; in radv_init_dcc_control_reg()
6268 S_028EE0_DCC_PIPE_ALIGNED(surf->u.gfx9.color.dcc.pipe_aligned); in radv_initialise_color_surface()
6273 S_028EE0_DCC_PIPE_ALIGNED(surf->u.gfx9.color.dcc.pipe_aligned); in radv_initialise_color_surface()
6281 meta = surf->u.gfx9.color.dcc; in radv_initialise_color_surface()
|
| D | radv_formats.c | 1198 .dcc = true,
|
| /third_party/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_peephole.cpp | 249 unsigned dcc = dflags & AF_CC_MASK; in optimize_CNDcc_op() local
281 if (dcc == AF_CC_NE) { in optimize_CNDcc_op()
282 dcc = AF_CC_E; in optimize_CNDcc_op()
287 switch (dcc) { in optimize_CNDcc_op()
288 case AF_CC_GT: dcc = AF_CC_GE; swap = !swap; break; in optimize_CNDcc_op()
289 case AF_CC_GE: dcc = AF_CC_GT; swap = !swap; break; in optimize_CNDcc_op()
302 a->bc.set_op(get_cndcc_op(dcc, dcmp_type)); in optimize_CNDcc_op()
|
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_sdma_copy_image.c | 164 bool dcc = vi_dcc_enabled(tiled, 0) && is_v5; in si_sdma_v4_v5_copy_texture() local
180 dcc << 19 | in si_sdma_v4_v5_copy_texture()
200 if (dcc) { in si_sdma_v4_v5_copy_texture()
212 tiled->surface.u.gfx9.color.dcc.max_compressed_block_size << 24 | in si_sdma_v4_v5_copy_texture()
215 tiled->surface.u.gfx9.color.dcc.pipe_aligned << 31); in si_sdma_v4_v5_copy_texture()
|
| D | si_state.c | 2631 … S_028C78_MAX_COMPRESSED_BLOCK_SIZE(tex->surface.u.gfx9.color.dcc.max_compressed_block_size) | in si_initialize_color_surface()
2633 … S_028C78_INDEPENDENT_64B_BLOCKS(tex->surface.u.gfx9.color.dcc.independent_64B_blocks); in si_initialize_color_surface()
2635 …ontrol |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX11(tex->surface.u.gfx9.color.dcc.independent_128B_bl… in si_initialize_color_surface()
2637 …ontrol |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX10(tex->surface.u.gfx9.color.dcc.independent_128B_bl… in si_initialize_color_surface()
3083 if (sctx->gfx_level >= GFX9 && !tex->surface.u.gfx9.color.dcc.pipe_aligned) in si_set_framebuffer_state()
3297 S_028EE0_DCC_PIPE_ALIGNED(tex->surface.u.gfx9.color.dcc.pipe_aligned); in si_emit_framebuffer_state()
3329 S_028EE0_DCC_PIPE_ALIGNED(tex->surface.u.gfx9.color.dcc.pipe_aligned); in si_emit_framebuffer_state()
3362 meta = tex->surface.u.gfx9.color.dcc; in si_emit_framebuffer_state()
4114 … S_00A018_MAX_COMPRESSED_BLOCK_SIZE(tex->surface.u.gfx9.color.dcc.max_compressed_block_size) | in gfx10_make_texture_descriptor()
|
| D | si_compute_blit.c | 596 ((struct si_texture*)images[i].resource)->surface.u.gfx9.color.dcc.pipe_aligned); in si_launch_grid_internal_images()
889 ((struct si_texture*)tex)->surface.u.gfx9.color.dcc.pipe_aligned); in si_compute_expand_fmask()
|
| D | si_descriptors.c | 359 meta = tex->surface.u.gfx9.color.dcc; in si_set_mutable_tex_desc_fields()
409 meta = tex->surface.u.gfx9.color.dcc; in si_set_mutable_tex_desc_fields()
|
| D | si_blit.c | 542 tex->surface.u.gfx9.color.dcc.pipe_aligned); in si_blit_decompress_color()
|
| D | si_texture.c | 1400 .dcc = !(sscreen->debug_flags & DBG(NO_DCC)), in si_query_dmabuf_modifiers()
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 21.3.9.rst | 119 - radeonsi: don't clear framebuffer.state before dcc decomp
|
| D | 21.3.4.rst | 140 - radeonsi/gfx8: use the proper dcc clear size
|
| D | 22.0.1.rst | 150 - radeonsi: don't clear framebuffer.state before dcc decomp
|
| D | 22.0.3.rst | 50 …ADDR2_COMPUTE_DCCINFO_OUTPUT \*, struct gfx9_meta_equation \*): assertion "dcc->equation.gfx9.num_…
|
| /third_party/libdrm/ |
| D | xf86drm.c | 415 uint64_t pipe, pipe_align, dcc, dcc_retile, tile_version; in drmGetFormatModifierNameFromAmdTile() local
419 dcc = AMD_FMT_MOD_GET(DCC, modifier); in drmGetFormatModifierNameFromAmdTile()
435 if (dcc && tile_version == AMD_FMT_MOD_TILE_VER_GFX9) { in drmGetFormatModifierNameFromAmdTile()
440 if (dcc && tile_version == AMD_FMT_MOD_TILE_VER_GFX9 && in drmGetFormatModifierNameFromAmdTile()
450 uint64_t tile, tile_version, dcc; in drmGetFormatModifierNameFromAmd() local
460 dcc = AMD_FMT_MOD_GET(DCC, modifier); in drmGetFormatModifierNameFromAmd()
509 if (dcc) in drmGetFormatModifierNameFromAmd()
|
| /third_party/icu/icu4c/source/data/rbnf/ |
| D | root.txt | 579 "700: dcc[>>];",
|
| /third_party/skia/third_party/externals/icu/source/data/rbnf/ |
| D | root.txt | 579 "700: dcc[>>];",
|
| /third_party/icu/icu4c/source/data/misc/ |
| D | likelySubtags.txt | 282 dcc{"dcc_Arab_IN"}
|
| /third_party/skia/third_party/externals/icu/source/data/misc/ |
| D | likelySubtags.txt | 279 dcc{"dcc_Arab_IN"}
|
| D | langInfo.txt | 532 "dcc","Arab","IN",
|
| /third_party/libabigail/tests/data/test-diff-pkg/ |
| D | spice-server-0.12.4-19.el7.x86_64-0.12.8-1.el7.x86_64-report-2.txt | 506 … type of 'DisplayChannelClient* dcc' changed:
545 … type of 'DisplayChannelClient* dcc' changed:
|