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Searched refs:dev_info (Results 1 – 25 of 52) sorted by relevance

123

/third_party/mesa3d/src/imagination/include/hwdef/
Drogue_hw_utils.h55 rogue_get_isp_samples_per_tile_xy(const struct pvr_device_info *dev_info, in rogue_get_isp_samples_per_tile_xy() argument
61 PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 0U); in rogue_get_isp_samples_per_tile_xy()
63 PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 0U); in rogue_get_isp_samples_per_tile_xy()
65 PVR_GET_FEATURE_VALUE(dev_info, isp_samples_per_pixel, 0U); in rogue_get_isp_samples_per_tile_xy()
106 rogue_get_min_free_list_size(const struct pvr_device_info *dev_info) in rogue_get_min_free_list_size() argument
110 if (PVR_HAS_FEATURE(dev_info, roguexe)) { in rogue_get_min_free_list_size()
111 if (PVR_HAS_QUIRK(dev_info, 66011)) in rogue_get_min_free_list_size()
123 rogue_get_max_num_vdm_pds_tasks(const struct pvr_device_info *dev_info) in rogue_get_max_num_vdm_pds_tasks() argument
126 uint32_t max_usc_tasks = PVR_GET_FEATURE_VALUE(dev_info, max_usc_tasks, 24U); in rogue_get_max_num_vdm_pds_tasks()
133 rogue_get_max_output_regs_per_pixel(const struct pvr_device_info *dev_info) in rogue_get_max_output_regs_per_pixel() argument
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/third_party/mesa3d/src/imagination/vulkan/
Dpvr_job_common.c107 static void pvr_pbe_get_src_pos(const struct pvr_device_info *dev_info, in pvr_pbe_get_src_pos() argument
129 if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) { in pvr_pbe_get_src_pos()
163 const struct pvr_device_info *dev_info, in pvr_pbe_pack_state() argument
204 pvr_pbe_get_src_pos(dev_info, in pvr_pbe_pack_state()
290 const struct pvr_device_info *dev_info, in pvr_setup_tiles_in_flight() argument
312 PVR_GET_FEATURE_VALUE(dev_info, usc_min_output_registers_per_pix, 0); in pvr_setup_tiles_in_flight()
316 assert(pixel_width <= rogue_get_max_output_regs_per_pixel(dev_info)); in pvr_setup_tiles_in_flight()
320 isp_samples = PVR_GET_FEATURE_VALUE(dev_info, isp_samples_per_pixel, 1); in pvr_setup_tiles_in_flight()
336 tile_size_x = PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 0); in pvr_setup_tiles_in_flight()
337 tile_size_y = PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 0); in pvr_setup_tiles_in_flight()
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Dpvr_hardcode.c142 pvr_device_get_bvnc(const struct pvr_device_info *const dev_info) in pvr_device_get_bvnc() argument
144 const struct pvr_device_ident *const ident = &dev_info->ident; in pvr_device_get_bvnc()
149 bool pvr_hard_code_shader_required(const struct pvr_device_info *const dev_info) in pvr_hard_code_shader_required() argument
152 const uint64_t bvnc = pvr_device_get_bvnc(dev_info); in pvr_hard_code_shader_required()
168 pvr_get_hard_coding_data(const struct pvr_device_info *const dev_info) in pvr_get_hard_coding_data() argument
171 const uint64_t bvnc = pvr_device_get_bvnc(dev_info); in pvr_get_hard_coding_data()
192 rogue_get_slc_cache_line_size(&device->pdevice->dev_info); in pvr_hard_code_compute_pipeline()
194 pvr_get_hard_coding_data(&device->pdevice->dev_info); in pvr_hard_code_compute_pipeline()
211 pvr_hard_code_graphics_get_flags(const struct pvr_device_info *const dev_info) in pvr_hard_code_graphics_get_flags() argument
214 pvr_get_hard_coding_data(dev_info); in pvr_hard_code_graphics_get_flags()
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Dpvr_job_render.c191 cache_line_size = rogue_get_slc_cache_line_size(&device->pdevice->dev_info); in pvr_free_list_create()
315 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_rt_mtile_info_init() local
321 info->tile_size_x = PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 1); in pvr_rt_mtile_info_init()
322 info->tile_size_y = PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 1); in pvr_rt_mtile_info_init()
327 rogue_get_num_macrotiles_xy(dev_info, &info->mtiles_x, &info->mtiles_y); in pvr_rt_mtile_info_init()
329 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_mtile_info_init()
330 assert(PVR_GET_FEATURE_VALUE(dev_info, in pvr_rt_mtile_info_init()
371 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_rt_get_isp_region_size() local
375 if (PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format)) { in pvr_rt_get_isp_region_size()
380 if (PVR_FEATURE_VALUE(dev_info, in pvr_rt_get_isp_region_size()
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Dpvr_job_context.c60 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_ctx_reset_cmd_init() local
63 assert(PVR_HAS_FEATURE(dev_info, compute)); in pvr_ctx_reset_cmd_init()
65 if (PVR_HAS_QUIRK(dev_info, 51764)) in pvr_ctx_reset_cmd_init()
68 if (PVR_HAS_QUIRK(dev_info, 58839)) in pvr_ctx_reset_cmd_init()
88 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_pds_pt_store_program_create_and_upload() local
89 const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info); in pvr_pds_pt_store_program_create_and_upload()
105 dev_info); in pvr_pds_pt_store_program_create_and_upload()
123 dev_info); in pvr_pds_pt_store_program_create_and_upload()
127 dev_info); in pvr_pds_pt_store_program_create_and_upload()
157 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_pds_pt_resume_program_create_and_upload() local
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Dpvr_hardcode.h79 bool pvr_hard_code_shader_required(const struct pvr_device_info *const dev_info);
90 pvr_hard_code_graphics_get_flags(const struct pvr_device_info *const dev_info);
99 const struct pvr_device_info *const dev_info,
105 const struct pvr_device_info *const dev_info,
110 const struct pvr_device_info *const dev_info,
115 const struct pvr_device_info *const dev_info,
123 const struct pvr_device_info *const dev_info,
Dpvr_tex_state.c70 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_pack_tex_state() local
149 if (!PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup) && in pvr_pack_tex_state()
150 !PVR_HAS_FEATURE(dev_info, tpu_image_state_v2)) { in pvr_pack_tex_state()
159 if (PVR_HAS_FEATURE(dev_info, tpu_image_state_v2) && in pvr_pack_tex_state()
172 } else if (PVR_HAS_FEATURE(dev_info, tpu_array_textures)) { in pvr_pack_tex_state()
184 if (!PVR_HAS_FEATURE(dev_info, tpu_extended_integer_lookup) && in pvr_pack_tex_state()
185 !PVR_HAS_FEATURE(dev_info, tpu_image_state_v2)) { in pvr_pack_tex_state()
200 if (PVR_HAS_FEATURE(dev_info, tpu_image_state_v2) && in pvr_pack_tex_state()
Dpvr_descriptor_set.c90 #define PVR_DESC_IMAGE_SECONDARY_OFFSET_ARRAYMAXINDEX(dev_info) \ argument
91 (PVR_HAS_FEATURE(dev_info, tpu_array_textures) \
97 #define PVR_DESC_IMAGE_SECONDARY_OFFSET_WIDTH(dev_info) \ argument
98 (PVR_DESC_IMAGE_SECONDARY_OFFSET_ARRAYMAXINDEX(dev_info) + \
101 #define PVR_DESC_IMAGE_SECONDARY_OFFSET_HEIGHT(dev_info) \ argument
102 (PVR_DESC_IMAGE_SECONDARY_OFFSET_WIDTH(dev_info) + \
105 #define PVR_DESC_IMAGE_SECONDARY_OFFSET_DEPTH(dev_info) \ argument
106 (PVR_DESC_IMAGE_SECONDARY_OFFSET_HEIGHT(dev_info) + \
109 #define PVR_DESC_IMAGE_SECONDARY_TOTAL_SIZE(dev_info) \ argument
110 (PVR_DESC_IMAGE_SECONDARY_OFFSET_DEPTH(dev_info) + \
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Dpvr_device.c274 bvnc = pvr_get_packed_bvnc(&pdevice->dev_info); in pvr_physical_device_init_uuids()
394 &pdevice->dev_info, in pvr_physical_device_init()
407 pdevice->dev_info.ident.series_name, in pvr_physical_device_init()
408 pdevice->dev_info.ident.public_name) < 0) { in pvr_physical_device_init()
433 pdevice->compiler = rogue_compiler_create(&pdevice->dev_info); in pvr_physical_device_init()
603 PVR_HAS_FEATURE(&pdevice->dev_info, robust_buffer_access), in pvr_GetPhysicalDeviceFeatures2()
624 .textureCompressionASTC_LDR = PVR_HAS_FEATURE(&pdevice->dev_info, astc), in pvr_GetPhysicalDeviceFeatures2()
673 const struct pvr_device_info *dev_info = &pdevice->dev_info; in pvr_calc_fscommon_size_and_tiles_in_flight() local
677 if (PVR_HAS_FEATURE(dev_info, s8xe)) { in pvr_calc_fscommon_size_and_tiles_in_flight()
678 num_allocs = PVR_GET_FEATURE_VALUE(dev_info, num_raster_pipes, 0U); in pvr_calc_fscommon_size_and_tiles_in_flight()
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Dpvr_pipeline.c193 const struct pvr_device_info *dev_info, in pvr_pds_get_max_vertex_program_const_map_size_in_bytes() argument
240 1U + (size_t)PVR_HAS_FEATURE(dev_info, pds_ddmadt); in pvr_pds_get_max_vertex_program_const_map_size_in_bytes()
346 &device->pdevice->dev_info, in pvr_pds_vertex_attrib_program_create_and_upload()
373 &device->pdevice->dev_info); in pvr_pds_vertex_attrib_program_create_and_upload()
393 &device->pdevice->dev_info); in pvr_pds_vertex_attrib_program_create_and_upload()
806 const struct pvr_device_info *dev_info, in pvr_pds_compute_program_setup() argument
852 pvr_pds_compute_shader(program, NULL, PDS_GENERATE_SIZES, dev_info); in pvr_pds_compute_program_setup()
868 struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_pds_compute_program_create_and_upload() local
874 pvr_pds_compute_program_setup(dev_info, in pvr_pds_compute_program_create_and_upload()
903 dev_info); in pvr_pds_compute_program_create_and_upload()
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Dpvr_pass.c213 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_load_op_create() local
214 const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info); in pvr_load_op_create()
298 #define PVR_SPM_LOAD_IN_BUFFERS_COUNT(dev_info) \ argument
301 if (PVR_HAS_FEATURE(dev_info, eight_output_registers)) \
500 PVR_SPM_LOAD_IN_BUFFERS_COUNT(&device->pdevice->dev_info); in pvr_CreateRenderPass2()
582 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_GetRenderAreaGranularity() local
590 pGranularity->width = PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 16); in pvr_GetRenderAreaGranularity()
591 pGranularity->height = PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 16); in pvr_GetRenderAreaGranularity()
Dpvr_cmd_buffer.c255 rogue_get_slc_cache_line_size(&device->pdevice->dev_info); in pvr_cmd_buffer_upload_tables()
322 rogue_get_slc_cache_line_size(&device->pdevice->dev_info); in pvr_cmd_buffer_upload_general()
351 rogue_get_slc_cache_line_size(&device->pdevice->dev_info); in pvr_cmd_buffer_upload_usc()
483 &device->pdevice->dev_info); in pvr_sub_cmd_gfx_per_job_fragment_programs_create_and_upload()
584 const struct pvr_device_info *dev_info = &device->pdevice->dev_info; in pvr_load_op_pds_data_create_and_upload() local
606 pvr_pds_set_sizes_pixel_shader_sa_texture_data(&program, dev_info); in pvr_load_op_pds_data_create_and_upload()
619 dev_info); in pvr_load_op_pds_data_create_and_upload()
705 const struct pvr_device_info *dev_info, in pvr_setup_pbe_state() argument
732 if (PVR_HAS_FEATURE(dev_info, usc_f16sop_u8)) { in pvr_setup_pbe_state()
787 assert(position <= 3 || PVR_HAS_FEATURE(dev_info, eight_output_registers)); in pvr_setup_pbe_state()
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/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
Dpvr_srv.c383 pvr_srv_get_min_free_list_size(const struct pvr_device_info *dev_info) in pvr_srv_get_min_free_list_size() argument
387 if (PVR_HAS_FEATURE(dev_info, roguexe)) { in pvr_srv_get_min_free_list_size()
388 if (PVR_HAS_QUIRK(dev_info, 66011)) in pvr_srv_get_min_free_list_size()
400 pvr_srv_get_num_phantoms(const struct pvr_device_info *dev_info) in pvr_srv_get_num_phantoms() argument
402 return DIV_ROUND_UP(PVR_GET_FEATURE_VALUE(dev_info, num_clusters, 1U), 4U); in pvr_srv_get_num_phantoms()
407 const struct pvr_device_info *dev_info) in pvr_srv_get_total_reserved_partition_size() argument
409 uint32_t tile_size_x = PVR_GET_FEATURE_VALUE(dev_info, tile_size_x, 0); in pvr_srv_get_total_reserved_partition_size()
410 uint32_t tile_size_y = PVR_GET_FEATURE_VALUE(dev_info, tile_size_y, 0); in pvr_srv_get_total_reserved_partition_size()
411 uint32_t max_partitions = PVR_GET_FEATURE_VALUE(dev_info, max_partitions, 0); in pvr_srv_get_total_reserved_partition_size()
415 PVR_GET_FEATURE_VALUE(dev_info, in pvr_srv_get_total_reserved_partition_size()
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/third_party/mesa3d/src/imagination/common/
Dpvr_device_info.h144 #define PVR_HAS_FEATURE(dev_info, feature) ((dev_info)->features.has_##feature) argument
166 #define PVR_FEATURE_VALUE(dev_info, feature, value_out) \ argument
168 const struct pvr_device_info *__dev_info = dev_info; \
197 #define PVR_GET_FEATURE_VALUE(dev_info, feature, default_value) \ argument
199 const struct pvr_device_info *__dev_info = dev_info; \
225 #define PVR_HAS_ERN(dev_info, number) ((dev_info)->enhancements.has_ern##number) argument
241 #define PVR_HAS_QUIRK(dev_info, number) ((dev_info)->quirks.has_brn##number) argument
389 pvr_get_packed_bvnc(const struct pvr_device_info *dev_info) in pvr_get_packed_bvnc() argument
391 return PVR_BVNC_PACK(dev_info->ident.b, in pvr_get_packed_bvnc()
392 dev_info->ident.v, in pvr_get_packed_bvnc()
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/third_party/libdrm/amdgpu/
Damdgpu_gpu_info.c144 r = amdgpu_query_info(dev, AMDGPU_INFO_DEV_INFO, sizeof(dev->dev_info), in amdgpu_query_gpu_info_init()
145 &dev->dev_info); in amdgpu_query_gpu_info_init()
149 dev->info.asic_id = dev->dev_info.device_id; in amdgpu_query_gpu_info_init()
150 dev->info.chip_rev = dev->dev_info.chip_rev; in amdgpu_query_gpu_info_init()
151 dev->info.chip_external_rev = dev->dev_info.external_rev; in amdgpu_query_gpu_info_init()
152 dev->info.family_id = dev->dev_info.family; in amdgpu_query_gpu_info_init()
153 dev->info.max_engine_clk = dev->dev_info.max_engine_clock; in amdgpu_query_gpu_info_init()
154 dev->info.max_memory_clk = dev->dev_info.max_memory_clock; in amdgpu_query_gpu_info_init()
155 dev->info.gpu_counter_freq = dev->dev_info.gpu_counter_freq; in amdgpu_query_gpu_info_init()
156 dev->info.enabled_rb_pipes_mask = dev->dev_info.enabled_rb_pipes_mask; in amdgpu_query_gpu_info_init()
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Damdgpu_device.c241 start = dev->dev_info.virtual_address_offset; in amdgpu_device_initialize()
242 max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL); in amdgpu_device_initialize()
244 dev->dev_info.virtual_address_alignment); in amdgpu_device_initialize()
247 max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL); in amdgpu_device_initialize()
249 dev->dev_info.virtual_address_alignment); in amdgpu_device_initialize()
251 start = dev->dev_info.high_va_offset; in amdgpu_device_initialize()
252 max = MIN2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) + in amdgpu_device_initialize()
255 dev->dev_info.virtual_address_alignment); in amdgpu_device_initialize()
258 max = MAX2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) + in amdgpu_device_initialize()
261 dev->dev_info.virtual_address_alignment); in amdgpu_device_initialize()
/third_party/mesa3d/src/vulkan/device-select-layer/
Ddevice_select_wayland.c34 drmDevicePtr dev_info; member
47 int ret = drmGetDevice2(fd, 0, &info->dev_info); in device_select_drm_handle_device()
127 if (info.dev_info->businfo.pci->domain == devices[i].bus_info.domain && in device_select_find_wayland_pci_default()
128 info.dev_info->businfo.pci->bus == devices[i].bus_info.bus && in device_select_find_wayland_pci_default()
129 info.dev_info->businfo.pci->dev == devices[i].bus_info.dev && in device_select_find_wayland_pci_default()
130 info.dev_info->businfo.pci->func == devices[i].bus_info.func) in device_select_find_wayland_pci_default()
133 if (info.dev_info->deviceinfo.pci->vendor_id == devices[i].dev_info.vendor_id && in device_select_find_wayland_pci_default()
134 info.dev_info->deviceinfo.pci->device_id == devices[i].dev_info.device_id) in device_select_find_wayland_pci_default()
141 drmFreeDevice(&info.dev_info); in device_select_find_wayland_pci_default()
/third_party/mesa3d/src/imagination/vulkan/pds/
Dpvr_pds.c102 const struct pvr_device_info *dev_info) in pvr_pds_encode_ld_src0() argument
106 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) { in pvr_pds_encode_ld_src0()
154 const struct pvr_device_info *dev_info) in pvr_pds_encode_doutw_src1() argument
168 cache_control_const[PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls) ? 0 in pvr_pds_encode_doutw_src1()
381 const struct pvr_device_info *dev_info) in pvr_pds_write_dma_address() argument
386 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) in pvr_pds_write_dma_address()
445 const struct pvr_device_info *dev_info) in pvr_pds_encode_dma_burst() argument
461 if (PVR_HAS_FEATURE(dev_info, slc_mcu_cache_controls)) { in pvr_pds_encode_dma_burst()
533 const struct pvr_device_info *dev_info) in pvr_pds_generate_pixel_event() argument
578 dev_info); in pvr_pds_generate_pixel_event()
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Dpvr_pds.h58 #define PVR_NEED_SW_COMPUTE_PDS_BARRIER(dev_info) \ argument
59 PVR_HAS_FEATURE(dev_info, compute_morton_capable) && \
60 !PVR_HAS_ERN(dev_info, 45493)
598 const struct pvr_device_info *dev_info);
623 const struct pvr_device_info *dev_info);
662 const struct pvr_device_info *dev_info);
683 const struct pvr_device_info *dev_info);
690 const struct pvr_device_info *dev_info);
715 const struct pvr_device_info *dev_info);
731 const struct pvr_device_info *dev_info);
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/third_party/mesa3d/src/freedreno/ir3/
Dir3_compiler.c179 const struct fd_dev_info *dev_info = fd_dev_info(compiler->dev_id); in ir3_compiler_create() local
219 compiler->tess_use_shared = dev_info->a6xx.tess_use_shared; in ir3_compiler_create()
221 compiler->storage_16bit = dev_info->a6xx.storage_16bit; in ir3_compiler_create()
223 compiler->has_getfiberid = dev_info->a6xx.has_getfiberid; in ir3_compiler_create()
225 compiler->has_dp2acc = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
226 compiler->has_dp4acc = dev_info->a6xx.has_dp4acc; in ir3_compiler_create()
244 compiler->reg_size_vec4 = dev_info->a6xx.reg_size_vec4; in ir3_compiler_create()
297 compiler->nir_options.has_udot_4x8 = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
298 compiler->nir_options.has_sudot_4x8 = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
/third_party/ltp/testcases/kernel/device-drivers/acpi/
Dltp_acpi_cmds.c146 struct acpi_device_info *dev_info; in acpi_traverse() local
172 status = acpi_get_object_info(new_child, &dev_info); in acpi_traverse()
191 ind, (char *)&dev_info->name, str_obj_result, in acpi_traverse()
195 kfree(dev_info); in acpi_traverse()
198 prk_info("%s%4.4s: path '%s'", ind, (char *)&dev_info->name, in acpi_traverse()
204 kfree(dev_info); in acpi_traverse()
213 struct acpi_device_info *dev_info; in acpi_traverse_from_root() local
220 status = acpi_get_object_info(parent, &dev_info); in acpi_traverse_from_root()
223 prk_info("start from %4.4s", (char *)&dev_info->name); in acpi_traverse_from_root()
224 kfree(dev_info); in acpi_traverse_from_root()
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/third_party/libdrm/tests/amdgpu/
Dvm_tests.c233 struct drm_amdgpu_info_device dev_info; in amdgpu_vm_mapping_test() local
248 sizeof(dev_info), &dev_info); in amdgpu_vm_mapping_test()
251 addr = dev_info.virtual_address_offset; in amdgpu_vm_mapping_test()
255 addr = dev_info.virtual_address_max - size; in amdgpu_vm_mapping_test()
259 if (dev_info.high_va_offset) { in amdgpu_vm_mapping_test()
260 addr = dev_info.high_va_offset; in amdgpu_vm_mapping_test()
264 addr = dev_info.high_va_max - size; in amdgpu_vm_mapping_test()
/third_party/mesa3d/src/imagination/rogue/
Drogue_compiler.c43 rogue_compiler_create(const struct pvr_device_info *dev_info) in rogue_compiler_create() argument
51 compiler->dev_info = dev_info; in rogue_compiler_create()
Drogue_compiler.h35 const struct pvr_device_info *dev_info; member
40 rogue_compiler_create(const struct pvr_device_info *dev_info);
/third_party/NuttX/drivers/usbdev/gadget/fconfig/src/
Dusbd_config.c78 struct usbdev_info **dev_info = g_fconfig_usbdev_info; in fconfig_find_usbdev_info() local
81 for (i = 0; dev_info[i] != NULL; i++) in fconfig_find_usbdev_info()
83 if (strcmp(dev_info[i]->name, name) == 0) in fconfig_find_usbdev_info()
85 return dev_info[i]; in fconfig_find_usbdev_info()
526 struct usbdev_info *dev_info = NULL; in fconfig_do_make_function() local
549 dev_info = fconfig_find_usbdev_info(func_name); in fconfig_do_make_function()
550 if (dev_info == NULL) in fconfig_do_make_function()
556 func_inst->dev_info = dev_info; in fconfig_do_make_function()
561 if (dev_info->type != DEV_GENERIC) in fconfig_do_make_function()
564 func_inst->minor = dev_info->type; in fconfig_do_make_function()
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