| /third_party/gstreamer/gstplugins_good/gst/deinterlace/tvtime/ |
| D | sse.h | 641 #define divss_m2r(var, reg) sse_m2r(divss, var, reg)
642 #define divss_r2r(regs, regd) sse_r2r(divss, regs, regd)
643 #define divss(vars, vard, xmmreg) sse_m2m(divss, vars, vard, xmmreg) macro
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| /third_party/node/deps/v8/src/codegen/x64/ |
| D | sse-instr.h | 38 V(divss, F3, 0F, 5E) \
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| /third_party/elfutils/libcpu/ |
| D | i386.mnemonics | 91 MNE(divss)
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| D | x86_64.mnemonics | 82 MNE(divss)
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerX8632.h | 514 void divss(Type Ty, XmmRegister dst, XmmRegister src);
515 void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
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| D | IceAssemblerX8664.h | 533 void divss(Type Ty, XmmRegister dst, XmmRegister src);
534 void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
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| D | IceAssemblerX8632.cpp | 551 void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) { in divss() function in Ice::X8632::AssemblerX8632
559 void AssemblerX8632::divss(Type Ty, XmmRegister dst, const AsmAddress &src) { in divss() function in Ice::X8632::AssemblerX8632
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| D | IceAssemblerX8664.cpp | 597 void AssemblerX8664::divss(Type Ty, XmmRegister dst, XmmRegister src) { in divss() function in Ice::X8664::AssemblerX8664
606 void AssemblerX8664::divss(Type Ty, XmmRegister dst, const AsmAddress &src) { in divss() function in Ice::X8664::AssemblerX8664
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| D | IceInstX8664.h | 3389 &Assembler::divss, &Assembler::divss};
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| D | IceInstX8632.h | 3492 &Assembler::divss, &Assembler::divss};
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| /third_party/node/deps/v8/src/codegen/ia32/ |
| D | assembler-ia32.h | 862 void divss(XMMRegister dst, XMMRegister src) { divss(dst, Operand(src)); } in divss() function
863 void divss(XMMRegister dst, Operand src);
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| D | assembler-ia32.cc | 2807 void Assembler::divss(XMMRegister dst, Operand src) { in divss() function in v8::internal::Assembler
|
| /third_party/gstreamer/gstplugins_good/gst/deinterlace/x86/ |
| D | x86inc.asm | 1355 AVX_INSTR divss, sse, 1, 0, 0
|
| /third_party/ffmpeg/libavutil/x86/ |
| D | x86inc.asm | 1369 AVX_INSTR divss, sse, 1, 0, 0
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| /third_party/node/deps/v8/src/codegen/shared-ia32-x64/ |
| D | macro-assembler-shared-ia32-x64.h | 252 AVX_OP(Divss, divss)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | XmmArith.cpp | 90 TestArithSSXmmXmm(FloatSize, Src, 7.0, Dst0, 70.0, divss, /); \ in TEST_F()
91 TestArithSSXmmAddr(FloatSize, 8.0, Dst1, 80.0, divss, /); \ in TEST_F()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | XmmArith.cpp | 95 TestArithSSXmmXmm(FloatSize, Src, 7.0, Dst0, 70.0, divss, /); \ in TEST_F()
96 TestArithSSXmmAddr(FloatSize, 8.0, Dst1, 80.0, divss, /); \ in TEST_F()
|
| /third_party/elfutils/tests/ |
| D | testfile44.expect.bz2 | |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| /third_party/elfutils/libcpu/defs/ |
| D | i386 | 714 11110011,00001111,01011110,{Mod}{xmmreg}{R_m}:divss {Mod}{R_m},{xmmreg}
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| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| D | liftoff-assembler-x64.h | 1529 divss(dst, kScratchDoubleReg); in emit_f32_div()
1532 divss(dst, rhs); in emit_f32_div()
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| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| D | liftoff-assembler-ia32.h | 1925 divss(dst, liftoff::kScratchDoubleReg); in emit_f32_div()
1928 divss(dst, rhs); in emit_f32_div()
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| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 1662 #define DIVSS(a, b) divss P_ARG2(a, b)
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| D | code-generator-ia32.cc | 238 __ divss(result_, result_); in Generate() local
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| D | code-generator-x64.cc | 1782 ASSEMBLE_SSE_BINOP(divss); in AssembleArchInstruction()
|