/third_party/libdrm/amdgpu/ |
D | amdgpu_gpu_info.c | 43 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_info() 58 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_crtc_from_id() 77 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_read_mm_registers() 93 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_hw_ip_count() 110 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_hw_ip_info() 130 r = drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_firmware_version() 331 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_sensor_info() 346 return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request, in amdgpu_query_video_caps_info()
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D | amdgpu_cs.c | 163 r = drmCommandWrite(master_fd, DRM_AMDGPU_SCHED, &args, sizeof(args)); in amdgpu_cs_ctx_override_priority()
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/third_party/mesa3d/src/freedreno/drm/msm/ |
D | msm_bo.c | 78 return drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_PREP, &req, sizeof(req)); in msm_bo_cpu_prep() 88 drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_FINI, &req, sizeof(req)); in msm_bo_cpu_fini() 146 drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_INFO, &req, sizeof(req)); in msm_bo_set_name()
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D | msm_pipe.c | 147 ret = drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &req, sizeof(req)); in msm_pipe_wait() 191 drmCommandWrite(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, &queue_id, in close_submitqueue()
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/third_party/libdrm/freedreno/msm/ |
D | msm_bo.c | 76 return drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_PREP, &req, sizeof(req)); in msm_bo_cpu_prep() 85 drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_FINI, &req, sizeof(req)); in msm_bo_cpu_fini()
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D | msm_pipe.c | 90 ret = drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &req, sizeof(req)); in msm_pipe_wait() 133 drmCommandWrite(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, in close_submitqueue()
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/third_party/mesa3d/src/gallium/winsys/svga/drm/ |
D | vmw_screen_ioctl.c | 132 (void)drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_UNREF_CONTEXT, in vmw_ioctl_context_destroy() 505 (void)drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_UNREF_SURFACE, in vmw_ioctl_surface_destroy() 571 ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_EXECBUF, &arg, argsize); in vmw_ioctl_command() 670 drmCommandWrite(region->drm_fd, DRM_VMW_UNREF_DMABUF, &arg, sizeof(arg)); in vmw_ioctl_region_destroy() 755 return drmCommandWrite(region->drm_fd, DRM_VMW_SYNCCPU, &arg, sizeof(arg)); in vmw_ioctl_syncforcpu() 781 (void) drmCommandWrite(region->drm_fd, DRM_VMW_SYNCCPU, &arg, sizeof(arg)); in vmw_ioctl_releasefromcpu() 794 ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_FENCE_UNREF, in vmw_ioctl_fence_unref() 911 (void)drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_UNREF_SHADER, in vmw_ioctl_shader_destroy() 1215 ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_GET_3D_CAP, in vmw_ioctl_init()
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D | vmw_screen.c | 105 if (drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_MKSSTAT_REMOVE, &arg, sizeof(arg))) { in vmw_winsys_screen_deinit_mksstat()
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/third_party/libdrm/nouveau/ |
D | abi16.c | 137 ret = drmCommandWrite(drm->fd, DRM_NOUVEAU_GROBJ_ALLOC, in abi16_engobj() 224 drmCommandWrite(drm->fd, DRM_NOUVEAU_CHANNEL_FREE, in abi16_delete() 230 drmCommandWrite(drm->fd, DRM_NOUVEAU_GPUOBJ_FREE, in abi16_delete()
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D | nouveau.c | 546 return drmCommandWrite(drm->fd, DRM_NOUVEAU_SETPARAM, &r, sizeof(r)); in nouveau_setparam() 865 ret = drmCommandWrite(drm->fd, DRM_NOUVEAU_GEM_CPU_PREP, in nouveau_bo_wait()
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/third_party/libdrm/omap/ |
D | omap_drm.c | 156 return drmCommandWrite(dev->fd, DRM_OMAP_SET_PARAM, &req, sizeof(req)); in omap_set_param() 455 return drmCommandWrite(bo->dev->fd, in omap_bo_cpu_prep() 466 return drmCommandWrite(bo->dev->fd, in omap_bo_cpu_fini()
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/third_party/libdrm/freedreno/kgsl/ |
D | kgsl_bo.c | 40 return drmCommandWrite(dev->fd, DRM_KGSL_GEM_SETMEMTYPE, in set_memtype() 283 ret = drmCommandWrite(bo->dev->fd, DRM_KGSL_GEM_SET_ACTIVE, in kgsl_bo_set_timestamp()
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/third_party/mesa3d/src/etnaviv/drm/ |
D | etnaviv_pipe.c | 44 ret = drmCommandWrite(dev->fd, DRM_ETNAVIV_WAIT_FENCE, &req, sizeof(req)); in etna_pipe_wait_ns()
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D | etnaviv_bo.c | 424 return drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_PREP, in etna_bo_cpu_prep() 434 drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_FINI, in etna_bo_cpu_fini()
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/third_party/libdrm/etnaviv/ |
D | etnaviv_pipe.c | 49 ret = drmCommandWrite(dev->fd, DRM_ETNAVIV_WAIT_FENCE, &req, sizeof(req)); in etna_pipe_wait_ns()
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D | etnaviv_bo.c | 328 return drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_PREP, in etna_bo_cpu_prep() 338 drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_FINI, in etna_bo_cpu_fini()
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/third_party/libdrm/ |
D | core-symbols.txt | 29 drmCommandWrite
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D | xf86drm.h | 629 extern int drmCommandWrite(int fd, unsigned long drmCommandIndex,
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D | xf86drm.c | 3082 drm_public int drmCommandWrite(int fd, unsigned long drmCommandIndex, in drmCommandWrite() function
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/third_party/mesa3d/src/gallium/drivers/nouveau/ |
D | nouveau_screen.c | 265 ret = drmCommandWrite(screen->drm->fd, DRM_NOUVEAU_SVM_INIT, in nouveau_screen_init()
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/third_party/libdrm/radeon/ |
D | radeon_bo_gem.c | 206 ret = drmCommandWrite(boi->bom->fd, DRM_RADEON_GEM_WAIT_IDLE, in bo_wait()
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/third_party/mesa3d/src/freedreno/vulkan/ |
D | tu_drm.c | 167 drmCommandWrite(dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, in tu_drm_submitqueue_close() 1124 ret = drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &req, sizeof(req)); in tu_device_wait_u_trace()
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/third_party/libdrm/intel/ |
D | intel_bufmgr_fake.c | 380 ret = drmCommandWrite(bufmgr_fake->fd, DRM_I915_IRQ_WAIT, in _fence_wait_internal() 1473 if (drmCommandWrite in drm_intel_fake_bo_exec()
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/third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
D | nvc0_context.c | 72 drmCommandWrite(fd, DRM_NOUVEAU_SVM_BIND, in nvc0_svm_migrate()
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/third_party/mesa3d/src/gallium/winsys/radeon/drm/ |
D | radeon_drm_bo.c | 100 while (drmCommandWrite(bo->rws->fd, DRM_RADEON_GEM_WAIT_IDLE, in radeon_real_bo_wait_idle()
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