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Searched refs:dst_rel (Results 1 – 16 of 16) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_builder.cpp430 .DST_REL(bc.dst_rel) in build_alu()
448 .DST_REL(bc.dst_rel) in build_alu()
462 .DST_REL(bc.dst_rel) in build_alu()
477 .DST_REL(bc.dst_rel) in build_alu()
493 .DST_REL(bc.dst_rel) in build_alu()
544 .DST_REL(bc.dst_rel) in build_fetch_tex()
587 .DST_REL_MODE(bc.dst_rel) in build_fetch_gds()
652 .DST_REL(bc.dst_rel) in build_fetch_vtx()
727 .DST_REL(bc.dst_rel) in build_fetch_mem()
Dsb_bc_decoder.cpp353 bc.dst_rel = w1.get_DST_REL(); in decode_alu()
370 bc.dst_rel = w1.get_DST_REL(); in decode_alu()
389 bc.dst_rel = w1.get_DST_REL(); in decode_alu()
479 bc.dst_rel = w1.get_DST_REL(); in decode_fetch()
561 bc.dst_rel = w1.get_DST_REL(); in decode_fetch_mem()
637 bc.dst_rel = w1.get_DST_REL(); in decode_fetch_vtx()
Dsb_bc_parser.cpp301 if (n->bc.dst_rel) in decode_alu_group()
462 assert(!n->bc.dst_rel || n->bc.index_mode == INDEX_AR_X); in prepare_alu_group()
465 n->bc.dst_rel); in prepare_alu_group()
502 prev_alu->bc.dst_rel); in prepare_alu_group()
642 if (n->bc.src_rel || n->bc.dst_rel) in decode_fetch_clause()
Dsb_bc.h517 unsigned dst_rel:1; member
548 dst_rel = 0; in clear()
582 unsigned dst_rel:1; member
Dsb_bc_dump.cpp242 print_sel(s, sel, alu.dst_rel, alu.index_mode, 0); in print_dst()
490 print_sel(s, n.bc.dst_gpr, n.bc.dst_rel, INDEX_LOOP, 0); in dump()
Dsb_bc_finalize.cpp330 n->bc.dst_rel = 1; in finalize_alu_group()
333 n->bc.dst_rel = 0; in finalize_alu_group()
472 if (pn->bc.dst_rel) { in finalize_alu_src()
/third_party/mesa3d/src/gallium/drivers/r600/
Dr600_asm.h79 unsigned dst_rel; member
133 unsigned dst_rel; member
146 unsigned dst_rel; member
Dr700_asm.c147 S_SQ_MEM_RD_WORD1_DST_REL(mem->dst_rel) | in r700_bytecode_fetch_mem_build()
Deg_asm.c244 S_SQ_MEM_GDS_WORD1_DST_REL(gds->dst_rel) | in eg_bytecode_gds_build()
Dr600_asm.c1682 S_SQ_TEX_WORD1_DST_REL(tex->dst_rel) | in r600_bytecode_tex_build()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td117 bits<1> dst_rel;
125 let Word1{28} = dst_rel;
DR600Instructions.td106 (ins WRITE:$write, OMOD:$omod, REL:$dst_rel, CLAMP:$clamp,
111 "$clamp $last $dst$write$dst_rel$omod, "
148 OMOD:$omod, REL:$dst_rel, CLAMP:$clamp,
154 "$clamp $last $update_exec_mask$update_pred$dst$write$dst_rel$omod, "
188 (ins REL:$dst_rel, CLAMP:$clamp,
194 !strconcat(" ", opName, "$clamp $last $dst$dst_rel, "
DR600InstrInfo.cpp1141 setImmOperand(*Mov, R600::OpName::dst_rel, 1); in buildIndirectWrite()
1296 OPERAND_CASE(R600::OpName::dst_rel) in getSlotedOps()
1337 R600::OpName::dst_rel, in buildSlotOfVectorInstruction()
DEvergreenInstructions.td476 let dst_rel = 0;
/third_party/libbpf/src/
Dlinker.c2006 Elf64_Rel *src_rel, *dst_rel; in linker_append_elf_relos() local
2049 dst_rel = dst_sec->raw_data + src_sec->dst_off; in linker_append_elf_relos()
2051 for (j = 0; j < n; j++, src_rel++, dst_rel++) { in linker_append_elf_relos()
2062 dst_rel->r_offset += src_linked_sec->dst_off; in linker_append_elf_relos()
2064 dst_rel->r_info = ELF64_R_INFO(dst_sym_idx, sym_type); in linker_append_elf_relos()
2080 insn = dst_linked_sec->raw_data + dst_rel->r_offset; in linker_append_elf_relos()
/third_party/mesa3d/src/gallium/frontends/nine/
Dnine_shader.c373 struct sm1_src_param dst_rel[1]; member
3507 sm1_read_dst_param(tx, &insn->dst[i], &insn->dst_rel[i]); in sm1_parse_instruction()