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Searched refs:dstin (Results 1 – 15 of 15) sorted by relevance

/third_party/optimized-routines/string/aarch64/
D__mtag_tag_region.S22 #define dstin x0 macro
33 add dstend, dstin, count
42 add tmp, dstin, tmp, lsl 4
44 stg dstin, [dstin]
45 stg dstin, [tmp]
46 stg dstin, [dstend, -16]
54 st2g dstin, [dstin]
55 st2g dstin, [dstin, 32]
56 st2g dstin, [dstend, -32]
71 st2g dstin, [dstin]
[all …]
D__mtag_tag_zero_region.S22 #define dstin x0 macro
33 add dstend, dstin, count
42 add tmp, dstin, tmp, lsl 4
44 stzg dstin, [dstin]
45 stzg dstin, [tmp]
46 stzg dstin, [dstend, -16]
54 stz2g dstin, [dstin]
55 stz2g dstin, [dstin, 32]
56 stz2g dstin, [dstend, -32]
71 stz2g dstin, [dstin]
[all …]
Dmemcpy.S16 #define dstin x0 macro
63 add dstend, dstin, count
74 stp A_l, A_h, [dstin]
83 str A_l, [dstin]
93 str A_lw, [dstin]
104 strb A_lw, [dstin]
105 strb B_lw, [dstin, tmp1]
119 stp A_l, A_h, [dstin]
120 stp B_l, B_h, [dstin, 16]
137 stp A_l, A_h, [dstin]
[all …]
Dstrcpy-mte.S16 #define dstin x0 macro
89 str dataq, [dstin]
90 str dataq2, [dstin, tmp]
91 IFSTPCPY (add result, dstin, len)
106 str data1, [dstin]
107 str data2, [dstin, tmp]
108 IFSTPCPY (add result, dstin, len)
117 str dataw1, [dstin]
118 str dataw2, [dstin, tmp]
119 IFSTPCPY (add result, dstin, len)
[all …]
Dmemset.S16 #define dstin x0 macro
29 add dstend, dstin, count
39 str val, [dstin]
44 str valw, [dstin]
48 strb valw, [dstin]
55 str q0, [dstin]
59 str q0, [dstin, 16]
67 str q0, [dstin, 16]
68 stp q0, q0, [dstin, 32]
75 bic dst, dstin, 15
[all …]
Dmemcpy-advsimd.S16 #define dstin x0 macro
59 add dstend, dstin, count
70 str A_q, [dstin]
79 str A_l, [dstin]
89 str A_lw, [dstin]
100 strb A_lw, [dstin]
101 strb B_lw, [dstin, tmp1]
113 stp A_q, B_q, [dstin]
126 stp A_q, B_q, [dstin]
127 stp E_q, F_q, [dstin, 32]
[all …]
Dstrcpy.S22 #define dstin x0 macro
140 add dst, dstin, pos, lsr #3 /* Bits to bytes. */
148 str data1, [dstin]
150 add dstin, dst, #8
157 add dst, dstin, pos, lsr #3 /* Bits to bytes. */
170 str data1w, [dstin]
172 mov dstin, dst
181 strh data1w, [dstin]
187 mov dstin, dst
196 stp data1, data2, [dstin]
[all …]
/third_party/musl/src/string/aarch64/
Dmemcpy.S14 #define dstin x0 macro
57 add dstend, dstin, count
68 stp A_l, A_h, [dstin]
77 str A_l, [dstin]
87 str A_lw, [dstin]
98 strb A_lw, [dstin]
99 strb B_lw, [dstin, tmp1]
113 stp A_l, A_h, [dstin]
114 stp B_l, B_h, [dstin, 16]
131 stp A_l, A_h, [dstin]
[all …]
Dmemset.S14 #define dstin x0 macro
27 add dstend, dstin, count
37 str val, [dstin]
42 str valw, [dstin]
46 strb valw, [dstin]
53 str q0, [dstin]
57 str q0, [dstin, 16]
65 str q0, [dstin, 16]
66 stp q0, q0, [dstin, 32]
73 bic dst, dstin, 15
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td1904 def : Pat<(fadd_mlx DPR:$dstin, (fmul_su DPR:$a, (f64 DPR:$b))),
1905 (VMLAD DPR:$dstin, DPR:$a, DPR:$b)>,
1907 def : Pat<(fadd_mlx SPR:$dstin, (fmul_su SPR:$a, SPR:$b)),
1908 (VMLAS SPR:$dstin, SPR:$a, SPR:$b)>,
1910 def : Pat<(fadd_mlx HPR:$dstin, (fmul_su HPR:$a, HPR:$b)),
1911 (VMLAH HPR:$dstin, HPR:$a, HPR:$b)>,
1945 def : Pat<(fsub_mlx DPR:$dstin, (fmul_su DPR:$a, (f64 DPR:$b))),
1946 (VMLSD DPR:$dstin, DPR:$a, DPR:$b)>,
1948 def : Pat<(fsub_mlx SPR:$dstin, (fmul_su SPR:$a, SPR:$b)),
1949 (VMLSS SPR:$dstin, SPR:$a, SPR:$b)>,
[all …]
/third_party/skia/src/core/
DSkBlendMode.cpp96 case SkBlendMode::kDstIn: stage = SkRasterPipeline::dstin; break; in SkBlendMode_AppendStages()
DSkRasterPipeline.h70 M(dstatop) M(dstin) M(dstout) M(dstover) \
/third_party/optimized-routines/string/arm/
Dmemcpy.S58 #define dstin r0 macro
125 mov dst, dstin /* Preserve dstin, we need to return it. */
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenDAGISel.inc51773 /*112342*/ OPC_RecordChild0, // #0 = $dstin
51787 …// Src: (fadd:{ *:[f64] } DPR:{ *:[f64] }:$dstin, (fmul:{ *:[f64] } DPR:{ *:[f64] }:$a, DPR:{ *:[f…
51788 … // Dst: (VMLAD:{ *:[f64] } DPR:{ *:[f64] }:$dstin, DPR:{ *:[f64] }:$a, DPR:{ *:[f64] }:$b)
51795 …// Src: (fadd:{ *:[f32] } SPR:{ *:[f32] }:$dstin, (fmul:{ *:[f32] } SPR:{ *:[f32] }:$a, SPR:{ *:[f…
51796 … // Dst: (VMLAS:{ *:[f32] } SPR:{ *:[f32] }:$dstin, SPR:{ *:[f32] }:$a, SPR:{ *:[f32] }:$b)
51803 …// Src: (fadd:{ *:[f16] } HPR:{ *:[f16] }:$dstin, (fmul:{ *:[f16] } HPR:{ *:[f16] }:$a, HPR:{ *:[f…
51804 … // Dst: (VMLAH:{ *:[f16] } HPR:{ *:[f16] }:$dstin, HPR:{ *:[f16] }:$a, HPR:{ *:[f16] }:$b)
51841 /*112498*/ OPC_RecordChild0, // #0 = $dstin
51855 …// Src: (fadd:{ *:[f64] } DPR:{ *:[f64] }:$dstin, (fmul:{ *:[f64] } DPR:{ *:[f64] }:$a, DPR:{ *:[f…
51856 … // Dst: (VFMAD:{ *:[f64] } DPR:{ *:[f64] }:$dstin, DPR:{ *:[f64] }:$a, DPR:{ *:[f64] }:$b)
[all …]
/third_party/skia/src/opts/
DSkRasterPipeline_opts.h1411 BLEND_MODE(dstin) { return d * sa; } in BLEND_MODE() argument
3410 BLEND_MODE(dstin) { return div255( d*sa ); }