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Searched refs:enabled_mask (Results 1 – 25 of 55) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_streamout.c70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
147 unsigned enabled_mask = 0, append_bitmask = 0; in si_set_streamout_targets() local
154 enabled_mask |= 1 << i; in si_set_streamout_targets()
172 if (!!sctx->streamout.enabled_mask != !!enabled_mask) { in si_set_streamout_targets()
173 sctx->streamout.enabled_mask = enabled_mask; in si_set_streamout_targets()
404 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
405 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
Dsi_descriptors.c238 unsigned mask = samplers->enabled_mask; in si_sampler_views_begin_new_cs()
253 unsigned mask = samplers->enabled_mask & samplers_declared; in si_sampler_views_check_encrypted()
586 samplers->enabled_mask |= 1u << slot; in si_set_sampler_views()
612 samplers->enabled_mask &= ~unbound_mask; in si_set_sampler_views()
654 unsigned mask = samplers->enabled_mask; in si_samplers_update_needs_color_decompress_mask()
687 uint mask = images->enabled_mask; in si_image_views_begin_new_cs()
703 uint mask = images->enabled_mask & images_declared; in si_image_views_check_encrypted()
722 if (images->enabled_mask & (1u << slot)) { in si_disable_shader_image()
730 images->enabled_mask &= ~(1u << slot); in si_disable_shader_image()
878 images->enabled_mask |= 1u << slot; in si_set_shader_image()
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/third_party/mesa3d/src/gallium/drivers/r600/
Dr600_streamout.c85 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty()
86 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty()
120 unsigned enabled_mask = 0, append_bitmask = 0; in r600_set_streamout_targets() local
134 enabled_mask |= 1 << i; in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
330 (rctx->streamout.enabled_mask << 4) | in r600_set_streamout_enable()
331 (rctx->streamout.enabled_mask << 8) | in r600_set_streamout_enable()
332 (rctx->streamout.enabled_mask << 12); in r600_set_streamout_enable()
Dr600_state_common.c497 dst->states.enabled_mask &= ~disable_mask; in r600_bind_sampler_states()
498 dst->states.dirty_mask &= dst->states.enabled_mask; in r600_bind_sampler_states()
499 dst->states.enabled_mask |= new_mask; in r600_bind_sampler_states()
501 dst->states.has_bordercolor_mask &= dst->states.enabled_mask; in r600_bind_sampler_states()
626 rctx->vertex_buffer_state.enabled_mask &= ~disable_mask; in r600_set_vertex_buffers()
627 rctx->vertex_buffer_state.dirty_mask &= rctx->vertex_buffer_state.enabled_mask; in r600_set_vertex_buffers()
628 rctx->vertex_buffer_state.enabled_mask |= new_buffer_mask; in r600_set_vertex_buffers()
671 remaining_mask = dst->views.enabled_mask & disable_mask; in r600_set_sampler_views()
710 (dst->states.enabled_mask & (1 << i)) && in r600_set_sampler_views()
730 dst->views.enabled_mask &= ~disable_mask; in r600_set_sampler_views()
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Dr600_hw_context.c404 ctx->vertex_buffer_state.dirty_mask = ctx->vertex_buffer_state.enabled_mask; in r600_begin_new_cs()
412 constbuf->dirty_mask = constbuf->enabled_mask; in r600_begin_new_cs()
413 samplers->views.dirty_mask = samplers->views.enabled_mask; in r600_begin_new_cs()
414 samplers->states.dirty_mask = samplers->states.enabled_mask; in r600_begin_new_cs()
Dr600_pipe.h386 uint32_t enabled_mask; member
396 uint32_t enabled_mask; member
422 uint32_t enabled_mask; member
430 uint32_t enabled_mask; /* non-NULL buffers */ member
475 uint32_t enabled_mask; member
/third_party/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_state.c128 so->enabled_mask &= ~(1 << index); in fd_set_constant_buffer()
132 so->enabled_mask |= 1 << index; in fd_set_constant_buffer()
153 so->enabled_mask &= ~modified_bits; in fd_set_shader_buffers()
173 so->enabled_mask |= BIT(n); in fd_set_shader_buffers()
216 so->enabled_mask |= BIT(n); in fd_set_shader_images()
227 so->enabled_mask &= ~BIT(n); in fd_set_shader_images()
240 so->enabled_mask &= ~mask; in fd_set_shader_images()
246 so->enabled_mask &= in fd_set_shader_images()
395 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, in fd_set_vertex_buffers()
398 so->count = util_last_bit(so->enabled_mask); in fd_set_vertex_buffers()
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Dfreedreno_draw.c142 u_foreach_bit (i, so->enabled_mask & so->writable_mask) in batch_draw_tracking_for_dirty_bits()
145 u_foreach_bit (i, so->enabled_mask & ~so->writable_mask) in batch_draw_tracking_for_dirty_bits()
150 u_foreach_bit (i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) { in batch_draw_tracking_for_dirty_bits()
163 u_foreach_bit (i, ctx->constbuf[s].enabled_mask) in batch_draw_tracking_for_dirty_bits()
176 u_foreach_bit (i, ctx->vtx.vertexbuf.enabled_mask) { in batch_draw_tracking_for_dirty_bits()
536 u_foreach_bit (i, so->enabled_mask & so->writable_mask) in fd_launch_grid()
539 u_foreach_bit (i, so->enabled_mask & ~so->writable_mask) in fd_launch_grid()
542 u_foreach_bit (i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) { in fd_launch_grid()
551 u_foreach_bit (i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask) in fd_launch_grid()
561 u_foreach_bit (i, ctx->global_bindings.enabled_mask) in fd_launch_grid()
Dfreedreno_context.h69 uint32_t enabled_mask; member
74 uint32_t enabled_mask; member
80 uint32_t enabled_mask; member
86 uint32_t enabled_mask; member
133 uint32_t enabled_mask; member
/third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_image.c219 unsigned enabled_mask = so->enabled_mask; in fd5_emit_images() local
222 while (enabled_mask) { in fd5_emit_images()
223 unsigned index = u_bit_scan(&enabled_mask); in fd5_emit_images()
Dfd5_compute.c128 u_foreach_bit (i, ctx->global_bindings.enabled_mask) in fd5_launch_grid()
139 u_foreach_bit (i, ctx->global_bindings.enabled_mask) { in fd5_launch_grid()
/third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_image.c239 unsigned enabled_mask = so->enabled_mask; in fd4_emit_images() local
242 while (enabled_mask) { in fd4_emit_images()
243 unsigned index = u_bit_scan(&enabled_mask); in fd4_emit_images()
Dfd4_compute.c147 u_foreach_bit (i, ctx->global_bindings.enabled_mask) in fd4_launch_grid()
158 u_foreach_bit (i, ctx->global_bindings.enabled_mask) { in fd4_launch_grid()
/third_party/mesa3d/src/gallium/drivers/v3d/
Dv3dx_state.c307 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, in v3d_set_vertex_buffers()
311 so->count = util_last_bit(so->enabled_mask); in v3d_set_vertex_buffers()
472 so->enabled_mask &= ~(1 << index); in v3d_set_constant_buffer()
477 so->enabled_mask |= 1 << index; in v3d_set_constant_buffer()
1346 so->enabled_mask |= 1 << n; in v3d_set_shader_buffers()
1348 so->enabled_mask &= ~(1 << n); in v3d_set_shader_buffers()
1360 so->enabled_mask &= ~mask; in v3d_set_shader_buffers()
1438 so->enabled_mask |= 1 << n; in v3d_set_shader_images()
1443 so->enabled_mask &= ~(1 << n); in v3d_set_shader_images()
1457 so->enabled_mask = 0; in v3d_set_shader_images()
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Dv3d_context.h252 uint32_t enabled_mask; member
259 uint32_t enabled_mask; member
287 uint32_t enabled_mask; member
313 uint32_t enabled_mask; member
Dv3dx_draw.c192 u_foreach_bit(i, v3d->constbuf[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
202 u_foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
212 u_foreach_bit(i, v3d->shaderimg[s].enabled_mask) { in v3d_predraw_check_stage_inputs()
222 u_foreach_bit(i, v3d->vertexbuf.enabled_mask) { in v3d_predraw_check_stage_inputs()
267 u_foreach_bit(i, v3d->vertexbuf.enabled_mask) { in v3d_state_reads_resource()
280 u_foreach_bit(i, v3d->constbuf[s].enabled_mask) { in v3d_state_reads_resource()
291 u_foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_state_reads_resource()
1050 u_foreach_bit(i, v3d->ssbo[s].enabled_mask) { in v3d_draw_vbo()
1056 u_foreach_bit(i, v3d->shaderimg[s].enabled_mask) { in v3d_draw_vbo()
1492 u_foreach_bit(i, v3d->ssbo[PIPE_SHADER_COMPUTE].enabled_mask) { in v3d_launch_grid()
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/third_party/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_context.h78 uint32_t enabled_mask; member
85 uint32_t enabled_mask; member
Detnaviv_context.c333 u_foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask) in etna_draw_vbo()
336 u_foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask) in etna_draw_vbo()
342 u_foreach_bit(i, ctx->vertex_buffer.enabled_mask) { in etna_draw_vbo()
Detnaviv_state.c97 so->enabled_mask &= ~(1 << index); in etna_set_constant_buffer()
108 so->enabled_mask |= 1 << index; in etna_set_constant_buffer()
453 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, in etna_set_vertex_buffers()
456 so->count = util_last_bit(so->enabled_mask); in etna_set_vertex_buffers()
/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dfd2_emit.c55 uint32_t enabled_mask = constbuf->enabled_mask; in emit_constants() local
60 while (enabled_mask) { in emit_constants()
61 unsigned index = ffs(enabled_mask) - 1; in emit_constants()
93 enabled_mask &= ~(1 << index); in emit_constants()
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_compute.c131 u_foreach_bit (i, ctx->global_bindings.enabled_mask) in fd6_launch_grid()
142 u_foreach_bit (i, ctx->global_bindings.enabled_mask) { in fd6_launch_grid()
/third_party/mesa3d/src/gallium/drivers/lima/
Dlima_state.c197 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, in lima_set_vertex_buffers()
201 so->count = util_last_bit(so->enabled_mask); in lima_set_vertex_buffers()
474 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, NULL, in lima_state_fini()
/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_state.c323 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, in vc4_set_vertex_buffers()
327 so->count = util_last_bit(so->enabled_mask); in vc4_set_vertex_buffers()
399 so->enabled_mask &= ~(1 << index); in vc4_set_constant_buffer()
409 so->enabled_mask |= 1 << index; in vc4_set_constant_buffer()
Dvc4_context.h179 uint32_t enabled_mask; member
186 uint32_t enabled_mask; member
/third_party/mesa3d/src/amd/compiler/
Daco_print_ir.cpp437 if ((exp.enabled_mask & identity_mask) != identity_mask) in print_instr_format_specific()
438 fprintf(output, " en:%c%c%c%c", exp.enabled_mask & 0x1 ? 'r' : '*', in print_instr_format_specific()
439 exp.enabled_mask & 0x2 ? 'g' : '*', exp.enabled_mask & 0x4 ? 'b' : '*', in print_instr_format_specific()
440 exp.enabled_mask & 0x8 ? 'a' : '*'); in print_instr_format_specific()

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