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Searched refs:fcvtl (Results 1 – 25 of 27) sorted by relevance

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/third_party/node/deps/v8/src/codegen/arm64/
Dmacro-assembler-arm64.h263 V(fcvtl, Fcvtl) \
1572 fcvtl(vd, vn); in Fcvtl()
Dassembler-arm64.h1709 void fcvtl(const VRegister& vd, const VRegister& vn);
Dassembler-arm64.cc2750 void Assembler::fcvtl(const VRegister& vd, const VRegister& vn) { in fcvtl() function in v8::internal::Assembler
/third_party/skia/src/core/
DSkVM.h317 fcvtl, // f16 in low half -> f32 variable
DSkVM.cpp2377 void Assembler::fcvtl(V d, V n) { this->op(0b0'0'0'01110'0'0'10000'10111'10, n,d); } in fcvtl() function in skvm::Assembler
4233 a->fcvtl (dst(), dst()); // 4x f16 -> 4x f32 in jit()
/third_party/node/deps/v8/src/execution/arm64/
Dsimulator-arm64.h2138 LogicVRegister fcvtl(VectorFormat vform, LogicVRegister dst,
Dsimulator-logic-arm64.cc3796 LogicVRegister Simulator::fcvtl(VectorFormat vform, LogicVRegister dst, in fcvtl() function in v8::internal::Simulator
Dsimulator-arm64.cc4033 fcvtl(vf_fcvtl, rd, rn); in VisitNEON2RegMisc()
/third_party/skia/tests/
DSkVMTest.cpp1710 a.fcvtl (A::v4, A::v3); in DEF_TEST()
/third_party/vixl/test/aarch64/
Dtest-trace-aarch64.cc2571 __ fcvtl(v8.V2D(), v25.V2S()); in GenerateTestSequenceNEONFP() local
2572 __ fcvtl(v27.V4S(), v14.V4H()); in GenerateTestSequenceNEONFP() local
Dtest-simulator-aarch64.cc4808 DEFINE_TEST_NEON_2DIFF_FP_LONG(fcvtl, Conversions) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
Dtest-cpu-features-aarch64.cc3182 TEST_FP_NEON(fcvtl_0, fcvtl(v0.V4S(), v1.V4H()))
3183 TEST_FP_NEON(fcvtl_1, fcvtl(v0.V2D(), v1.V2S()))
/third_party/vixl/src/aarch64/
Dsimulator-aarch64.h4303 LogicVRegister fcvtl(VectorFormat vform,
Dassembler-aarch64.h2394 void fcvtl(const VRegister& vd, const VRegister& vn);
Dassembler-aarch64.cc3040 void Assembler::fcvtl(const VRegister& vd, const VRegister& vn) { in fcvtl() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc5948 LogicVRegister Simulator::fcvtl(VectorFormat vform, in fcvtl() function in vixl::aarch64::Simulator
Dmacro-assembler-aarch64.h1530 fcvtl(vd, vn); in Fcvtl()
Dsimulator-aarch64.cc6810 fcvtl(vf_fcvtl, rd, rn); in Simulator()
/third_party/vixl/test/test-trace-reference/
Dlog-disasm2217 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s
2218 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h
Dlog-disasm-colour2217 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s
2218 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h
Dlog-cpufeatures-custom2216 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s ### {FP, NEON} ###
2217 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h ### {FP, NEON} ###
Dlog-cpufeatures-colour2216 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s FP, NEON
2217 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h FP, NEON
Dlog-cpufeatures2216 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s // Needs: FP, NEON
2217 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h // Needs: FP, NEON
Dlog-all9688 0x~~~~~~~~~~~~~~~~ 0e617b28 fcvtl v8.2d, v25.2s
9690 0x~~~~~~~~~~~~~~~~ 0e2179db fcvtl v27.4s, v14.4h
/third_party/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md3693 void fcvtl(const VRegister& vd, const VRegister& vn)

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