| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64.h | 275 V(fminnmp, Fminnmp) \
380 V(fminnmp, Fminnmp) \
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| D | assembler-arm64.h | 1563 void fminnmp(const VRegister& vd, const VRegister& vn);
1618 void fminnmp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| D | assembler-arm64.cc | 3145 V(fminnmp, NEON_FMINNMP, 0)
3189 void Assembler::fminnmp(const VRegister& vd, const VRegister& vn) { in fminnmp() function in v8::internal::Assembler
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| /third_party/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2638 __ fminnmp(d9, v1.V2D()); in GenerateTestSequenceNEONFP() local
2639 __ fminnmp(s21, v20.V2S()); in GenerateTestSequenceNEONFP() local
2640 __ fminnmp(v16.V2D(), v21.V2D(), v19.V2D()); in GenerateTestSequenceNEONFP() local
2641 __ fminnmp(v16.V2S(), v31.V2S(), v25.V2S()); in GenerateTestSequenceNEONFP() local
2642 __ fminnmp(v26.V4S(), v16.V4S(), v15.V4S()); in GenerateTestSequenceNEONFP() local
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| D | test-cpu-features-aarch64.cc | 3264 TEST_FP_NEON(fminnmp_0, fminnmp(s0, v1.V2S()))
3265 TEST_FP_NEON(fminnmp_1, fminnmp(d0, v1.V2D()))
3266 TEST_FP_NEON(fminnmp_2, fminnmp(v0.V2S(), v1.V2S(), v2.V2S()))
3267 TEST_FP_NEON(fminnmp_3, fminnmp(v0.V4S(), v1.V4S(), v2.V4S()))
3268 TEST_FP_NEON(fminnmp_4, fminnmp(v0.V2D(), v1.V2D(), v2.V2D()))
3666 TEST_FP_NEON_NEONHALF(fminnmp_0, fminnmp(v0.V4H(), v1.V4H(), v2.V4H()))
3667 TEST_FP_NEON_NEONHALF(fminnmp_1, fminnmp(v0.V8H(), v1.V8H(), v2.V8H()))
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| D | test-simulator-aarch64.cc | 4626 DEFINE_TEST_NEON_3SAME_FP(fminnmp, Basic)
4722 DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD(fminnmp, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| D | test-api-movprfx-aarch64.cc | 2031 __ fminnmp(z1.VnD(), p0.Merging(), z1.VnD(), z14.VnD()); in TEST() local
2886 __ fminnmp(z1.VnD(), p0.Merging(), z1.VnD(), z14.VnD()); in TEST() local
3218 __ fminnmp(z1.VnD(), p0.Merging(), z1.VnD(), z1.VnD()); in TEST() local
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| /third_party/vixl/test/test-trace-reference/ |
| D | log-disasm | 2284 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d
2285 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s
2286 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d
2287 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s
2288 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s
|
| D | log-disasm-colour | 2284 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d
2285 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s
2286 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d
2287 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s
2288 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s
|
| D | log-cpufeatures-custom | 2283 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d ### {FP, NEON} ###
2284 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s ### {FP, NEON} ###
2285 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d ### {FP, NEON} ###
2286 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s ### {FP, NEON} ###
2287 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s ### {FP, NEON} ###
|
| D | log-cpufeatures-colour | 2283 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d [1;35mFP, NEON[0;m
2284 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s [1;35mFP, NEON[0;m
2285 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d [1;35mFP, NEON[0;m
2286 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s [1;35mFP, NEON[0;m
2287 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s [1;35mFP, NEON[0;m
|
| D | log-cpufeatures | 2283 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d // Needs: FP, NEON
2284 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s // Needs: FP, NEON
2285 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d // Needs: FP, NEON
2286 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s // Needs: FP, NEON
2287 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s // Needs: FP, NEON
|
| D | log-all | 9822 0x~~~~~~~~~~~~~~~~ 7ef0c829 fminnmp d9, v1.2d
9824 0x~~~~~~~~~~~~~~~~ 7eb0ca95 fminnmp s21, v20.2s
9826 0x~~~~~~~~~~~~~~~~ 6ef3c6b0 fminnmp v16.2d, v21.2d, v19.2d
9828 0x~~~~~~~~~~~~~~~~ 2eb9c7f0 fminnmp v16.2s, v31.2s, v25.2s
9830 0x~~~~~~~~~~~~~~~~ 6eafc61a fminnmp v26.4s, v16.4s, v15.4s
|
| /third_party/vixl/src/aarch64/ |
| D | macro-assembler-sve-aarch64.cc | 632 V(Fminnmp, fminnmp) \ in VIXL_SVE_NONCOMM_ARITH_ZZZZII_LIST()
|
| D | assembler-aarch64.h | 3609 void fminnmp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
3612 void fminnmp(const VRegister& vd, const VRegister& vn);
6034 void fminnmp(const ZRegister& zd,
|
| D | simulator-aarch64.cc | 3366 fminnmp(vform, result, zdn, zm); in Simulator()
7184 fminnmp(vf, rd, rn, rm); in Simulator()
7376 SIM_FUNC(FMINNMP, fminnmp); in Simulator()
9023 fminnmp(vf, rd, rn); in Simulator()
|
| D | assembler-aarch64.cc | 3715 V(fminnmp, NEON_FMINNMP, 0, 0)
3917 void Assembler::fminnmp(const VRegister& vd, const VRegister& vn) { in fminnmp() function in vixl::aarch64::Assembler
|
| D | simulator-aarch64.h | 4111 V(fminnmp, fminnm, FPMinNM)
|
| D | macro-assembler-aarch64.h | 2837 V(fminnmp, Fminnmp) \
2983 V(fminnmp, Fminnmp) \
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.h | 2064 V(fminnmp, fminnm, FPMinNM)
|
| D | simulator-arm64.cc | 4284 fminnmp(vf, rd, rn, rm); in VisitNEON3Same()
5713 fminnmp(vf, rd, rn); in VisitNEONScalarPairwise()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12504 "\004fmin\006fminnm\007fminnmp\007fminnmv\005fminp\005fminv\004fmla\005f"
14257 …{ 1427 /* fminnmp */, AArch64::FMINNMPv2i16p, Convert__FPRAsmOperandFPR161_0__VectorReg641_1, AMFB…
14258 …{ 1427 /* fminnmp */, AArch64::FMINNMPv2i32p, Convert__FPRAsmOperandFPR321_0__VectorReg641_1, AMFB…
14259 …{ 1427 /* fminnmp */, AArch64::FMINNMPv2i64p, Convert__FPRAsmOperandFPR641_0__VectorReg1281_1, AMF…
14260 …{ 1427 /* fminnmp */, AArch64::FMINNMPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1…
14261 …{ 1427 /* fminnmp */, AArch64::FMINNMPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1…
14262 …{ 1427 /* fminnmp */, AArch64::FMINNMPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1…
14263 …{ 1427 /* fminnmp */, AArch64::FMINNMPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641…
14264 …{ 1427 /* fminnmp */, AArch64::FMINNMPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641…
14265 …{ 1427 /* fminnmp */, AArch64::FMINNMP_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1…
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 1528 defm FMINNMP_ZPmZZ : sve2_fp_pairwise_pred<0b101, "fminnmp", int_aarch64_sve_fminnmp>;
|
| D | AArch64InstrInfo.td | 3860 defm FMINNMP : SIMDThreeSameVectorFP<1,1,0b000,"fminnmp", int_aarch64_neon_fminnmp>;
4729 defm FMINNMP : SIMDFPPairwiseScalar<1, 0b01100, "fminnmp">;
|
| /third_party/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3941 void fminnmp(const VRegister& vd, const VRegister& vn)
3948 void fminnmp(const VRegister& vd, const VRegister& vn, const VRegister& vm)
7816 void fminnmp(const ZRegister& zd,
|