Home
last modified time | relevance | path

Searched refs:getDesc (Results 1 – 25 of 170) sorted by relevance

1234567

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.h334 return MI.getDesc().TSFlags & SIInstrFlags::SALU; in isSALU()
342 return MI.getDesc().TSFlags & SIInstrFlags::VALU; in isVALU()
358 return MI.getDesc().TSFlags & SIInstrFlags::SOP1; in isSOP1()
366 return MI.getDesc().TSFlags & SIInstrFlags::SOP2; in isSOP2()
374 return MI.getDesc().TSFlags & SIInstrFlags::SOPC; in isSOPC()
382 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK()
390 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP()
398 return MI.getDesc().TSFlags & SIInstrFlags::IsPacked; in isPacked()
406 return MI.getDesc().TSFlags & SIInstrFlags::VOP1; in isVOP1()
414 return MI.getDesc().TSFlags & SIInstrFlags::VOP2; in isVOP2()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonShuffler.cpp155 setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad()); in HexagonCVIResource()
156 setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore()); in HexagonCVIResource()
229 MCInst const &Inst = ISJ->getDesc(); in restrictSlot1AOK()
237 MCInst const &Inst = ISJ->getDesc(); in restrictSlot1AOK()
260 MCInst const &Inst = ISJ->getDesc(); in restrictNoSlot1Store()
269 MCInst const &Inst = ISJ->getDesc(); in restrictNoSlot1Store()
270 if (HexagonMCInstrInfo::getDesc(MCII, Inst).mayStore()) { in restrictNoSlot1Store()
315 MCInst const &ID = ISJ->getDesc(); in check()
347 if (HexagonMCInstrInfo::getDesc(MCII, ID).isReturn()) in check()
379 if (HexagonMCInstrInfo::getDesc(MCII, ID).mayLoad()) { in check()
[all …]
DHexagonMCInstrInfo.cpp211 uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getMemAccessSize()
218 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getAddrMode()
223 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII, in getDesc() function in HexagonMCInstrInfo
286 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtendableOp()
304 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentAlignment()
310 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentBits()
316 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in isExtentSigned()
349 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getNewValueOp()
374 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getNewValueOp2()
402 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getUnits()
[all …]
DHexagonMCChecker.cpp87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init()
302 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in reportBranchErrors()
313 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkHWLoop()
327 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkCOFMax1()
415 bool Branch = HexagonMCInstrInfo::getDesc(MCII, I).isBranch(); in checkNewValues()
455 HexagonMCInstrInfo::getDesc(MCII, *std::get<0>(Producer)); in checkNewValues()
496 unsigned Defs = HexagonMCInstrInfo::getDesc(MCII, Inst).getNumDefs(); in checkRegistersReadOnly()
513 for (unsigned j = HexagonMCInstrInfo::getDesc(MCII, I).getNumDefs(), in registerUsed()
529 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in registerProducer()
554 HexagonMCInstrInfo::getDesc(MCII, I).mayLoad()) { in checkRegisterCurDefs()
DHexagonMCShuffler.cpp41 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo()); in init()
63 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
86 MCInst const &MI = I->getDesc(); in copyTo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.cpp209 assert(LastInst.getDesc().isConditionalBranch() && in parseCondBranch()
256 if (J->getDesc().isUnconditionalBranch() || in analyzeBranch()
257 J->getDesc().isIndirectBranch()) { in analyzeBranch()
273 if (I->getDesc().isIndirectBranch()) in analyzeBranch()
281 if (NumTerminators == 1 && I->getDesc().isUnconditionalBranch()) { in analyzeBranch()
287 if (NumTerminators == 1 && I->getDesc().isConditionalBranch()) { in analyzeBranch()
293 if (NumTerminators == 2 && std::prev(I)->getDesc().isConditionalBranch() && in analyzeBranch()
294 I->getDesc().isUnconditionalBranch()) { in analyzeBranch()
312 if (!I->getDesc().isUnconditionalBranch() && in removeBranch()
313 !I->getDesc().isConditionalBranch()) in removeBranch()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp21 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
42 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType()
45 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
DARMBaseRegisterInfo.cpp499 const MCInstrDesc &Desc = MI->getDesc(); in getFrameIndexInstrOffset()
685 const MCInstrDesc &Desc = MI->getDesc(); in isFrameOffsetLegal()
799 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4 || in eliminateFrameIndex()
800 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode6 || in eliminateFrameIndex()
801 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7 || in eliminateFrameIndex()
802 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7s2 || in eliminateFrameIndex()
803 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == in eliminateFrameIndex()
813 const MCInstrDesc &MCID = MI.getDesc(); in eliminateFrameIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyCallIndirectFixup.cpp130 make_range(MI.operands_begin() + MI.getDesc().getNumDefs() + 1, in runOnMachineFunction()
133 Ops.push_back(MI.getOperand(MI.getDesc().getNumDefs())); in runOnMachineFunction()
136 while (MI.getNumOperands() > MI.getDesc().getNumDefs()) in runOnMachineFunction()
/third_party/skia/src/core/
DSkDescriptor.cpp141 this->reset(*that.getDesc()); in SkAutoDescriptor()
144 this->reset(*that.getDesc()); in operator =()
149 this->reset(*that.getDesc()); in SkAutoDescriptor()
157 this->reset(*that.getDesc()); in operator =()
DSkRemoteGlyphCache.cpp44 auto* desc = ad->getDesc(); in auto_descriptor_from_desc()
142 memcpy(ad->getDesc(), const_cast<const char*>(result), descLength); in readDescriptor()
144 if (ad->getDesc()->getLength() > descLength) return false; in readDescriptor()
145 return ad->getDesc()->isValid(); in readDescriptor()
248 return *fDescriptor.getDesc(); in getDescriptor()
365 SkASSERT(fDescriptor.getDesc() != nullptr);
387 serializer->writeDescriptor(*fDescriptor.getDesc()); in writePendingGlyphs()
973 msg.appendf(" Received descriptor:\n%s", sourceAd.getDesc()->dumpRec().c_str()); in readStrikeData()
994 auto* client_desc = auto_descriptor_from_desc(sourceAd.getDesc(), tf->uniqueID(), &ad); in readStrikeData()
DSkStrikeSpec.h92 return fTypeface->createScalerContext(effects, fAutoDescriptor.getDesc()); in createScalerContext()
95 const SkDescriptor& descriptor() const { return *fAutoDescriptor.getDesc(); } in descriptor()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp110 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()
135 unsigned SchedClass = MI->getDesc().getSchedClass(); in resolveSchedClass()
198 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
242 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
327 unsigned SchedClass = MI->getDesc().getSchedClass(); in computeReciprocalThroughput()
DExecutionDomainFix.cpp237 const MCInstrDesc &MCID = MI->getDesc(); in processDefs()
259 for (unsigned i = mi->getDesc().getNumDefs(), in visitHardInstr()
260 e = mi->getDesc().getNumOperands(); in visitHardInstr()
271 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitHardInstr()
290 for (unsigned i = mi->getDesc().getNumDefs(), in visitSoftInstr()
291 e = mi->getDesc().getNumOperands(); in visitSoftInstr()
DTargetInstrInfo.cpp160 const MCInstrDesc &MCID = MI.getDesc(); in commuteInstructionImpl()
197 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
202 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
292 const MCInstrDesc &MCID = MI.getDesc(); in findCommutedOpIndices()
328 const MCInstrDesc &MCID = MI.getDesc(); in PredicateInstruction()
1072 unsigned Class = MI.getDesc().getSchedClass(); in getNumMicroOps()
1106 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrLatency()
1116 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency()
1192 unsigned DefClass = DefMI.getDesc().getSchedClass(); in getOperandLatency()
1193 unsigned UseClass = UseMI.getDesc().getSchedClass(); in getOperandLatency()
DPeepholeOptimizer.cpp870 NumDefs = MI.getDesc().getNumDefs(); in UncoalescableRewriter()
1170 assert(MI.getDesc().getNumDefs() == 1 && in optimizeCoalescableCopy()
1315 const MCInstrDesc &MCID = MI.getDesc(); in isLoadFoldable()
1334 const MCInstrDesc &MCID = MI.getDesc(); in isMoveImmediate()
1355 for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) { in foldImmediate()
1518 if (MI.getDesc().getNumDefs() != 1) in findTargetRecurrence()
1756 const MCInstrDesc &MIDesc = MI->getDesc(); in runOnMachineFunction()
1837 if (Def->getDesc().getNumDefs() != 1) in getNextSourceFromBitcast()
2053 (DefIdx < Def->getDesc().getNumDefs() || in getNextSourceImpl()
2054 Def->getDesc().isVariadic())) || in getNextSourceImpl()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86DiscriminateMemOps.cpp113 if (BypassPrefetchInstructions && IsPrefetchOpcode(MI.getDesc().Opcode)) in runOnMachineFunction()
129 if (X86II::getMemoryOperandNo(MI.getDesc().TSFlags) < 0) in runOnMachineFunction()
131 if (BypassPrefetchInstructions && IsPrefetchOpcode(MI.getDesc().Opcode)) in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/
DLSUnit.cpp70 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in dispatch()
154 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in isAvailable()
172 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in onInstructionRetired()
DScheduler.cpp74 const InstrDesc &D = IS->getDesc(); in issueInstructionImpl()
199 uint64_t BusyResourceMask = Resources->checkAvailability(IS.getDesc()); in select()
253 if (Resources->checkAvailability(IS.getDesc())) in analyzeDataDependencies()
291 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in mustIssueImmediately()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DStatistic.cpp144 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0; in sort()
194 Stats.Stats[i]->getDesc()); in PrintStatistics()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp1558 const uint64_t F = MI.getDesc().TSFlags; in isPredicated()
1647 if (!MI.getDesc().isPredicable()) in isPredicable()
1707 if (MI.getDesc().isTerminator() || MI.isPosition()) in isSchedulingBoundary()
2007 const uint64_t F = MI.getDesc().TSFlags; in isAccumulator()
2016 return !isTC1(MI) && !isTC2Early(MI) && !MI.getDesc().mayLoad() && in isComplex()
2017 !MI.getDesc().mayStore() && in isComplex()
2018 MI.getDesc().getOpcode() != Hexagon::S2_allocframe && in isComplex()
2019 MI.getDesc().getOpcode() != Hexagon::L2_deallocframe && in isComplex()
2031 const uint64_t F = MI.getDesc().TSFlags; in isConstExtended()
2090 if (!ProdMI.getDesc().getNumDefs()) in isDependent()
[all …]
DHexagonOptAddrMode.cpp127 const MCInstrDesc &MID = MI.getDesc(); in INITIALIZE_PASS_DEPENDENCY()
194 const MCInstrDesc &UseMID = UseMI.getDesc(); in canRemoveAddasl()
357 const MCInstrDesc &MID = MI->getDesc(); in processAddUses()
416 const MCInstrDesc &MID = UseMI->getDesc(); in updateAddUses()
444 const MCInstrDesc &MID = MI.getDesc(); in analyzeUses()
625 const MCInstrDesc &UseMID = UseMI->getDesc(); in changeAddAsl()
672 const MCInstrDesc &MID = UseMI->getDesc(); in xformUseMI()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp567 return (MI.getDesc().TSFlags & MipsII::IsCTI) == 0; in SafeInForbiddenSlot()
572 return (MI.getDesc().TSFlags & MipsII::HasForbiddenSlot) != 0; in HasForbiddenSlot()
579 return MI.getDesc().getSize(); in getInstSizeInBytes()
650 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) { in genInstrWithNewOpc()
658 for (unsigned J = I->getDesc().getNumOperands(), E = I->getNumOperands(); in genInstrWithNewOpc()
667 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) { in genInstrWithNewOpc()
686 const MCInstrDesc &MCID = MI.getDesc(); in findCommutedOpIndices()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/
DDispatchStage.cpp81 const InstrDesc &Desc = IS.getDesc(); in dispatch()
161 const InstrDesc &Desc = Inst.getDesc(); in isAvailable()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCInstrInfo.cpp409 return MI.getDesc().getSize(); in getInstSizeInBytes()
413 const MCInstrDesc &MID = MI.getDesc(); in isPostIncrement()
419 const MCInstrDesc &MID = MI.getDesc(); in isPreIncrement()

1234567