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Searched refs:getparam (Results 1 – 9 of 9) sorted by relevance

/third_party/musl/libc-test/src/functionalext/supplement/thread/
Dpthread_attr_setschedparam.c28 struct sched_param getparam; in pthread_attr_setschedparam_0100() local
35 getparam.sched_priority = 0; in pthread_attr_setschedparam_0100()
36 ret = pthread_attr_getschedparam(&attr, &getparam); in pthread_attr_setschedparam_0100()
38 EXPECT_EQ("pthread_attr_setschedparam_0100", getparam.sched_priority, setparam.sched_priority); in pthread_attr_setschedparam_0100()
Dpthread_attr_get.c364 struct sched_param getparam; in pthread_attr_getschedparam_0100() local
367 memset(&getparam, 0x0, sizeof(getparam)); in pthread_attr_getschedparam_0100()
374 ret = pthread_attr_getschedparam(&attr, &getparam); in pthread_attr_getschedparam_0100()
376 EXPECT_EQ("pthread_attr_getschedparam_0100", getparam.sched_priority, 1); in pthread_attr_getschedparam_0100()
/third_party/mesa3d/src/intel/tools/
Dintel_dump_gpu.c543 struct drm_i915_getparam *getparam = argp; in ioctl() local
547 if (getparam->param == I915_PARAM_CHIPSET_ID) in ioctl()
548 return get_pci_id(fd, getparam->value); in ioctl()
551 switch (getparam->param) { in ioctl()
553 *getparam->value = devinfo.timestamp_frequency; in ioctl()
562 *getparam->value = 1; in ioctl()
566 *getparam->value = devinfo.ver >= 8 && devinfo.platform != INTEL_PLATFORM_CHV; in ioctl()
578 struct drm_i915_gem_context_param *getparam = argp; in ioctl() local
583 switch (getparam->param) { in ioctl()
586 getparam->value = 1ull << 36; in ioctl()
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/third_party/curl/tests/
Dmanpage-scan.pl182 my @getparam; # store all parsed parameters
206 push @getparam, $title;
/third_party/mesa3d/src/intel/common/tests/
Dmi_builder_test.cpp191 drm_i915_getparam getparam = drm_i915_getparam(); in SetUp() local
192 getparam.param = I915_PARAM_CHIPSET_ID; in SetUp()
193 getparam.value = &device_id; in SetUp()
195 (void *)&getparam), 0) << strerror(errno); in SetUp()
220 drm_i915_getparam getparam = drm_i915_getparam(); in SetUp() local
221 getparam.param = I915_PARAM_HAS_EXEC_SOFTPIN; in SetUp()
222 getparam.value = &has_softpin; in SetUp()
224 (void *)&getparam), 0) << strerror(errno); in SetUp()
/third_party/mesa3d/src/intel/dev/
Dintel_device_info.c1403 getparam(int fd, uint32_t param, int *value) in getparam() function
1541 if (!getparam(fd, I915_PARAM_SLICE_MASK, &slice_mask)) in getparam_topology()
1545 if (!getparam(fd, I915_PARAM_EU_TOTAL, &n_eus)) in getparam_topology()
1549 if (!getparam(fd, I915_PARAM_SUBSLICE_MASK, &subslice_mask)) in getparam_topology()
1991 if (getparam(fd, I915_PARAM_CS_TIMESTAMP_FREQUENCY, in intel_get_device_info_from_fd()
1999 if (!getparam(fd, I915_PARAM_REVISION, &devinfo->revision)) in intel_get_device_info_from_fd()
/third_party/musl/Benchmark/musl/
Dlibc_pthread.cpp674 struct sched_param getparam; in Bm_function_pthread_attr_getschedparam() local
680 getparam.sched_priority = 0; in Bm_function_pthread_attr_getschedparam()
682 if (pthread_attr_getschedparam(&attr, &getparam) != 0) { in Bm_function_pthread_attr_getschedparam()
/third_party/mesa3d/src/gallium/winsys/virgl/drm/
Dvirgl_drm_winsys.c1208 struct drm_virtgpu_getparam getparam = { 0 }; in virgl_drm_winsys_create() local
1210 getparam.param = params[i].param; in virgl_drm_winsys_create()
1211 getparam.value = (uint64_t)(uintptr_t)&value; in virgl_drm_winsys_create()
1212 ret = drmIoctl(drmFD, DRM_IOCTL_VIRTGPU_GETPARAM, &getparam); in virgl_drm_winsys_create()
/third_party/mesa3d/docs/relnotes/
D20.1.0.rst2404 - intel/dump_gpu: Handle a bunch of getparam in the no-HW case
2808 - intel/tools/dump_gpu: fix getparam values