| /third_party/mesa3d/src/freedreno/decode/ |
| D | crashdec.c | 347 options.ibs[1].base = regval64("CP_IB1_BASE"); in dump_cmdstream()
348 options.ibs[1].rem = regval("CP_IB1_REM_SIZE"); in dump_cmdstream()
349 options.ibs[2].base = regval64("CP_IB2_BASE"); in dump_cmdstream()
350 options.ibs[2].rem = regval("CP_IB2_REM_SIZE"); in dump_cmdstream()
362 options.ibs[1].rem += regval("CP_CSQ_IB1_STAT") >> 16; in dump_cmdstream()
363 options.ibs[2].rem += regval("CP_CSQ_IB2_STAT") >> 16; in dump_cmdstream()
366 printf("IB1: %" PRIx64 ", %u\n", options.ibs[1].base, options.ibs[1].rem); in dump_cmdstream()
367 printf("IB2: %" PRIx64 ", %u\n", options.ibs[2].base, options.ibs[2].rem); in dump_cmdstream()
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| D | cffdec.c | 100 } ibs[4]; variable
171 if (!options->ibs[ib].base) in highlight_gpuaddr()
174 if ((ib > 0) && options->ibs[ib - 1].base && !ibs[ib - 1].triggered) in highlight_gpuaddr()
177 if (ibs[ib].triggered) in highlight_gpuaddr()
180 if (options->ibs[ib].base != ibs[ib].base) in highlight_gpuaddr()
183 uint64_t start = ibs[ib].base + 4 * (ibs[ib].size - options->ibs[ib].rem); in highlight_gpuaddr()
184 uint64_t end = ibs[ib].base + 4 * ibs[ib].size; in highlight_gpuaddr()
188 ibs[ib].triggered |= triggered; in highlight_gpuaddr()
748 memset(&ibs, 0, sizeof(ibs)); in reset_regs()
2182 ibs[ib].base = ibaddr; in cp_indirect()
[all …]
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| D | cffdec.h | 79 } ibs[4]; member
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| /third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_cs.c | 153 struct amdgpu_cs_ib_info *ibs; member
902 struct amdgpu_cs_ib_info ibs[2]; in radv_amdgpu_winsys_cs_submit_chained() local
945 ibs[0] = radv_amdgpu_cs(initial_preamble_cs)->ib; in radv_amdgpu_winsys_cs_submit_chained()
946 ibs[1] = cs0->ib; in radv_amdgpu_winsys_cs_submit_chained()
949 ibs[0] = cs0->ib; in radv_amdgpu_winsys_cs_submit_chained()
956 request.ibs = ibs; in radv_amdgpu_winsys_cs_submit_chained()
983 struct amdgpu_cs_ib_info *ibs; in radv_amdgpu_winsys_cs_submit_fallback() local
1006 ibs = malloc(number_of_ibs * sizeof(*ibs)); in radv_amdgpu_winsys_cs_submit_fallback()
1007 if (!ibs) { in radv_amdgpu_winsys_cs_submit_fallback()
1015 ibs[0] = radv_amdgpu_cs(initial_preamble_cs)->ib; in radv_amdgpu_winsys_cs_submit_fallback()
[all …]
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| /third_party/node/deps/openssl/openssl/crypto/bio/ |
| D | bf_buff.c | 242 int ibs, obs; in buffer_ctrl() local
307 ibs = (int)num; in buffer_ctrl()
311 ibs = ctx->ibuf_size; in buffer_ctrl()
315 ibs = (int)num; in buffer_ctrl()
320 if ((ibs > DEFAULT_BUFFER_SIZE) && (ibs != ctx->ibuf_size)) { in buffer_ctrl()
340 ctx->ibuf_size = ibs; in buffer_ctrl()
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| /third_party/openssl/crypto/bio/ |
| D | bf_buff.c | 242 int ibs, obs; in buffer_ctrl() local
307 ibs = (int)num; in buffer_ctrl()
311 ibs = ctx->ibuf_size; in buffer_ctrl()
315 ibs = (int)num; in buffer_ctrl()
320 if ((ibs > DEFAULT_BUFFER_SIZE) && (ibs != ctx->ibuf_size)) { in buffer_ctrl()
340 ctx->ibuf_size = ibs; in buffer_ctrl()
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| /third_party/node/deps/openssl/openssl/crypto/comp/ |
| D | c_zlib.c | 551 int ibs, obs; in bio_zlib_ctrl() local
572 ibs = -1; in bio_zlib_ctrl()
577 ibs = (int)num; in bio_zlib_ctrl()
581 ibs = (int)num; in bio_zlib_ctrl()
582 obs = ibs; in bio_zlib_ctrl()
585 if (ibs != -1) { in bio_zlib_ctrl()
588 ctx->ibufsize = ibs; in bio_zlib_ctrl()
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| /third_party/openssl/crypto/comp/ |
| D | c_zlib.c | 551 int ibs, obs; in bio_zlib_ctrl() local
572 ibs = -1; in bio_zlib_ctrl()
577 ibs = (int)num; in bio_zlib_ctrl()
581 ibs = (int)num; in bio_zlib_ctrl()
582 obs = ibs; in bio_zlib_ctrl()
585 if (ibs != -1) { in bio_zlib_ctrl()
588 ctx->ibufsize = ibs; in bio_zlib_ctrl()
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| /third_party/libdrm/tests/amdgpu/ |
| D | deadlock_tests.c | 295 ibs_request.ibs = &ib_info; in amdgpu_deadlock_helper()
391 ibs_request.ibs = &ib_info; in amdgpu_deadlock_sdma()
472 ibs_request.ibs = &ib_info; in bad_access_helper()
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| D | hotunplug_tests.c | 222 ibs_request.ibs = &ib_info; in amdgpu_nop_cs()
394 ibs_request.ibs = &ib_info; in amdgpu_hotunplug_with_exported_fence()
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| D | basic_tests.c | 903 ibs_request.ibs = ib_info; in amdgpu_command_submission_gfx_separate_ibs()
987 ibs_request.ibs = ib_info; in amdgpu_command_submission_gfx_shared_ib()
1253 ibs_request[0].ibs = &ib_info[0]; in amdgpu_semaphore_test()
1270 ibs_request[1].ibs = &ib_info[1]; in amdgpu_semaphore_test()
1294 ibs_request[0].ibs = &ib_info[0]; in amdgpu_semaphore_test()
1311 ibs_request[1].ibs = &ib_info[1]; in amdgpu_semaphore_test()
1388 ibs_request.ibs = &ib_info; in amdgpu_command_submission_compute_nop()
1497 ibs_request->ibs = ib_info; in amdgpu_test_exec_cs_helper_raw()
2117 ibs_request[i].ibs = ib_info; in amdgpu_command_submission_multi_fence_wait_all()
2385 ibs_request.ibs = &ib_info; in amdgpu_sync_dependency_test()
[all …]
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| D | vm_tests.c | 154 ibs_request.ibs = &ib_info; in amdgpu_vmid_reserve_test()
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| D | amdgpu_stress.c | 235 ibs_request.ibs = &ib_info; in submit_ib()
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| D | vcn_tests.c | 211 ibs_request.ibs = &ib_info; in submit()
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| D | cs_tests.c | 171 ibs_request.ibs = &ib_info; in submit()
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| D | cp_dma_tests.c | 234 ibs_request.ibs = &ib_info; in submit_and_sync()
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| D | uvd_enc_tests.c | 172 ibs_request.ibs = &ib_info; in submit()
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| D | jpeg_tests.c | 254 ibs_request.ibs = &ib_info; in submit()
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| D | vce_tests.c | 216 ibs_request.ibs = &ib_info; in submit()
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| /third_party/libdrm/amdgpu/ |
| D | amdgpu.h | 369 struct amdgpu_cs_ib_info *ibs; member
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| D | amdgpu_cs.c | 285 ib = &ibs_request->ibs[i]; in amdgpu_cs_submit_one()
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| /third_party/ffmpeg/libavcodec/ |
| D | cbs_h2645.c | 288 #define ibs(width, name, subs, ...) \ macro
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| D | cbs_h265_syntax_template.c | 1977 ibs(current->time_offset_length[i], time_offset_value[i], 1, i); in FUNC()
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| /third_party/ltp/testcases/kernel/fs/scsi/ltpscsi/ |
| D | scsimain.c | 2195 int ibs = 0; in do_scsi_device_read_write() local
2232 if ((ibs && (ibs != bs)) || (obs && (obs != bs))) { in do_scsi_device_read_write()
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| /third_party/rust/crates/regex/bench/src/data/ |
| D | 1MB.txt | 23005 ibs
|