/third_party/node/deps/v8/src/diagnostics/mips64/ |
D | disasm-mips64.cc | 401 int32_t imm21 = instr->Imm21Value(); in PrintSImm21() local 403 imm21 <<= (32 - kImm21Bits); in PrintSImm21() 404 imm21 >>= (32 - kImm21Bits); in PrintSImm21() 405 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21); in PrintSImm21() 412 int32_t imm21 = instr->Imm21Value(); in PrintPCImm21() local 414 imm21 <<= (32 - kImm21Bits); in PrintPCImm21() 415 imm21 >>= (32 - kImm21Bits); in PrintPCImm21() 419 delta_pc + (imm21 << n_bits))); in PrintPCImm21() 2215 int32_t imm21 = instr->Imm21Value(); in DecodeTypeImmediate() local 2217 uint8_t rt = (imm21 >> kImm16Bits); in DecodeTypeImmediate() [all …]
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/third_party/node/deps/v8/src/diagnostics/mips/ |
D | disasm-mips.cc | 370 int32_t imm21 = instr->Imm21Value(); in PrintSImm21() local 372 imm21 <<= (32 - kImm21Bits); in PrintSImm21() 373 imm21 >>= (32 - kImm21Bits); in PrintSImm21() 374 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21); in PrintSImm21() 381 int32_t imm21 = instr->Imm21Value(); in PrintPCImm21() local 383 imm21 <<= (32 - kImm21Bits); in PrintPCImm21() 384 imm21 >>= (32 - kImm21Bits); in PrintPCImm21() 388 delta_pc + (imm21 << n_bits))); in PrintPCImm21() 1942 int32_t imm21 = instr->Imm21Value(); in DecodeTypeImmediate() local 1944 uint8_t rt = (imm21 >> kImm16Bits); in DecodeTypeImmediate() [all …]
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/third_party/vixl/src/aarch64/ |
D | instructions-aarch64.cc | 947 ptrdiff_t imm21; in SetPCRelImmTarget() local 949 imm21 = target - this; in SetPCRelImmTarget() 954 imm21 = target_page - this_page; in SetPCRelImmTarget() 956 Instr imm = Assembler::ImmPCRelAddress(static_cast<int32_t>(imm21)); in SetPCRelImmTarget()
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D | assembler-aarch64.h | 656 void adr(const Register& xd, int64_t imm21); 662 void adrp(const Register& xd, int64_t imm21); 7063 static Instr ImmPCRelAddress(int64_t imm21) { in ImmPCRelAddress() argument 7064 VIXL_ASSERT(IsInt21(imm21)); in ImmPCRelAddress() 7065 Instr imm = static_cast<Instr>(TruncateToUint21(imm21)); in ImmPCRelAddress()
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D | assembler-aarch64.cc | 446 void Assembler::adr(const Register& xd, int64_t imm21) { in adr() argument 448 Emit(ADR | ImmPCRelAddress(imm21) | Rd(xd)); in adr() 457 void Assembler::adrp(const Register& xd, int64_t imm21) { in adrp() argument 459 Emit(ADRP | ImmPCRelAddress(imm21) | Rd(xd)); in adrp()
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/third_party/node/deps/v8/src/codegen/riscv64/ |
D | assembler-riscv64.cc | 388 int32_t imm21 = JumpOffset(instr); in target_at() local 389 if (imm21 == kEndOfJumpChain) { in target_at() 393 return pos + imm21; in target_at() 739 int32_t imm21 = ((instr & 0x7fe00000) >> 20) | ((instr & 0x100000) >> 9) | in JumpOffset() local 741 imm21 = imm21 << 11 >> 11; in JumpOffset() 742 return imm21; in JumpOffset() 998 void Assembler::GenInstrJ(Opcode opcode, Register rd, int32_t imm21) { in GenInstrJ() argument 999 DCHECK(rd.is_valid() && is_int21(imm21) && ((imm21 & 1) == 0)); in GenInstrJ() 1001 (imm21 & 0xff000) | // bits 19-12 in GenInstrJ() 1002 ((imm21 & 0x800) << 9) | // bit 11 in GenInstrJ() [all …]
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D | assembler-riscv64.h | 1113 void j(int32_t imm21) { jal(zero_reg, imm21); } in j() argument 1116 void jal(int32_t imm21) { jal(ra, imm21); } in jal() argument
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/third_party/node/deps/v8/src/codegen/arm64/ |
D | assembler-arm64-inl.h | 863 Instr Assembler::ImmPCRelAddress(int imm21) { 864 CHECK(is_int21(imm21)); 865 Instr imm = static_cast<Instr>(truncate_to_int21(imm21));
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D | assembler-arm64.h | 414 void adr(const Register& rd, int imm21); 2165 inline static Instr ImmPCRelAddress(int imm21);
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D | assembler-arm64.cc | 824 void Assembler::adr(const Register& rd, int imm21) { in adr() argument 826 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd)); in adr()
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/third_party/node/deps/v8/src/codegen/mips64/ |
D | assembler-mips64.cc | 2313 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc() local 2314 GenInstrImmediate(PCREL, rs, imm21); in addiupc() 2320 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); in lwpc() local 2321 GenInstrImmediate(PCREL, rs, imm21); in lwpc() 2327 uint32_t imm21 = LWUPC << kImm19Bits | (offset19 & kImm19Mask); in lwupc() local 2328 GenInstrImmediate(PCREL, rs, imm21); in lwupc() 2334 uint32_t imm21 = LDPC << kImm18Bits | (offset18 & kImm18Mask); in ldpc() local 2335 GenInstrImmediate(PCREL, rs, imm21); in ldpc() 2341 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); in auipc() local 2342 GenInstrImmediate(PCREL, rs, imm21); in auipc() [all …]
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/third_party/node/deps/v8/src/codegen/mips/ |
D | assembler-mips.cc | 2188 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc() local 2189 GenInstrImmediate(PCREL, rs, imm21); in addiupc() 2195 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); in lwpc() local 2196 GenInstrImmediate(PCREL, rs, imm21); in lwpc() 2202 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); in auipc() local 2203 GenInstrImmediate(PCREL, rs, imm21); in auipc() 2209 uint32_t imm21 = ALUIPC << kImm16Bits | (imm16 & kImm16Mask); in aluipc() local 2210 GenInstrImmediate(PCREL, rs, imm21); in aluipc()
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/third_party/node/deps/v8/src/codegen/loong64/ |
D | macro-assembler-loong64.cc | 1174 int64_t imm21 = (value >> 31) & 0x1fffffL; in CallRecordWriteStub() local 1175 if (imm21 != 0x1fffffL && imm21 != 0) { in CallRecordWriteStub() 1215 int64_t imm21 = (imm >> 31) & 0x1fffffL; in CallRecordWriteStub() local 1217 if (imm21 != 0x1fffffL && imm21 != 0) lu32i_d(rd, imm >> 32 & 0xfffff); in CallRecordWriteStub()
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/third_party/node/deps/v8/src/execution/mips64/ |
D | simulator-mips64.cc | 7145 int32_t imm21 = instr_.Imm21Value(); in DecodeTypeImmediate() local 7147 uint8_t rt = (imm21 >> kImm16Bits); in DecodeTypeImmediate() 7159 rt = (imm21 >> kImm18Bits); in DecodeTypeImmediate() 7168 rt = (imm21 >> kImm19Bits); in DecodeTypeImmediate()
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/third_party/node/deps/v8/src/execution/mips/ |
D | simulator-mips.cc | 6771 int32_t imm21 = instr_.Imm21Value(); in DecodeTypeImmediate() local 6773 uint8_t rt = (imm21 >> kImm16Bits); in DecodeTypeImmediate() 6785 rt = (imm21 >> kImm19Bits); in DecodeTypeImmediate()
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/third_party/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 60 void adr(const Register& xd, int64_t imm21) 74 void adrp(const Register& xd, int64_t imm21)
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