Searched refs:imm_val (Results 1 – 6 of 6) sorted by relevance
/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_disasm.c | 373 printf("%f", uif(src->imm_val << 12)); in print_src() 376 printf("%d", ((int) src->imm_val << 12) >> 12); in print_src() 379 printf("%d", src->imm_val); in print_src() 382 printf("%f/%.5X", _mesa_half_to_float(src->imm_val), src->imm_val); in print_src()
|
D | etnaviv_asm.h | 85 unsigned imm_val : 20; member 144 .imm_val = bits, in etna_immediate_src()
|
/third_party/mesa3d/src/intel/compiler/ |
D | brw_disasm.c | 1275 uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst); in src0_3src() local 1279 format(file, "%dW", imm_val); in src0_3src() 1281 format(file, "0x%04xUW", imm_val); in src0_3src() 1283 format(file, "0x%04xHF", imm_val); in src0_3src() 1433 uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst); in src2_3src() local 1437 format(file, "%dW", imm_val); in src2_3src() 1439 format(file, "0x%04xUW", imm_val); in src2_3src() 1441 format(file, "0x%04xHF", imm_val); in src2_3src()
|
/third_party/mesa3d/src/compiler/nir/ |
D | nir_builder.h | 1069 nir_pad_vector_imm_int(nir_builder *b, nir_ssa_def *src, uint64_t imm_val, in nir_pad_vector_imm_int() argument 1077 nir_ssa_scalar imm = nir_get_ssa_scalar(nir_imm_intN_t(b, imm_val, src->bit_size), 0); in nir_pad_vector_imm_int()
|
/third_party/node/deps/v8/src/execution/s390/ |
D | simulator-s390.cc | 2801 #define DECODE_SI_INSTRUCTION_I_UINT8(b1, d1_val, imm_val) \ argument 2804 uint8_t imm_val = AS(SIInstruction)->I2Value(); \ 5851 DECODE_SI_INSTRUCTION_I_UINT8(b1, d1_val, imm_val) in EVALUATE() 5855 SetS390ConditionCode<uint8_t>(mem_val, imm_val); in EVALUATE() 10483 DECODE_SI_INSTRUCTION_I_UINT8(b1, d1_val, imm_val) in EVALUATE() 10487 uint8_t selected_bits = mem_val & imm_val; in EVALUATE() 10490 condition_reg_ = TestUnderMask(selected_bits, imm_val, is_tm_or_tmy); in EVALUATE() 10497 DECODE_SIY_INSTRUCTION(b1, d1_val, imm_val); in EVALUATE() 10501 uint8_t selected_bits = mem_val & imm_val; in EVALUATE() 10504 condition_reg_ = TestUnderMask(selected_bits, imm_val, is_tm_or_tmy); in EVALUATE() [all …]
|
/third_party/node/deps/v8/src/execution/arm/ |
D | simulator-arm.cc | 2241 int32_t imm_val = (instr->ImmedHValue() << 4) | instr->ImmedLValue(); in DecodeType01() local 2247 rn_val = base::SubWithWraparound(rn_val, imm_val); in DecodeType01() 2255 rn_val = base::AddWithWraparound(rn_val, imm_val); in DecodeType01() 2261 rn_val = base::SubWithWraparound(rn_val, imm_val); in DecodeType01() 2270 rn_val = base::AddWithWraparound(rn_val, imm_val); in DecodeType01()
|