| /third_party/node/deps/v8/src/codegen/mips/ |
| D | assembler-mips-inl.h | 124 Instr instr2 = Assembler::instr_at(pc + 1 * kInstrSize); in set_target_internal_reference_encoded_at() local
126 DCHECK(Assembler::IsOri(instr2) || Assembler::IsJicOrJialc(instr2)); in set_target_internal_reference_encoded_at()
128 instr2 &= ~kImm16Mask; in set_target_internal_reference_encoded_at()
131 if (Assembler::IsJicOrJialc(instr2)) { in set_target_internal_reference_encoded_at()
137 Assembler::instr_at_put(pc + 1 * kInstrSize, instr2 | jic_offset_u); in set_target_internal_reference_encoded_at()
140 PatchLuiOriImmediate(pc, imm, instr1, 0 * kInstrSize, instr2, in set_target_internal_reference_encoded_at()
218 Instr instr2 = Assembler::instr_at(pc_ + 1 * kInstrSize); in target_internal_reference() local
220 DCHECK(Assembler::IsOri(instr2) || Assembler::IsJicOrJialc(instr2)); in target_internal_reference()
221 if (Assembler::IsJicOrJialc(instr2)) { in target_internal_reference()
223 Assembler::CreateTargetAddress(instr1, instr2)); in target_internal_reference()
[all …]
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| D | assembler-mips.cc | 860 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at() local
861 DCHECK(IsOri(instr2) || IsJicOrJialc(instr2)); in target_at()
863 if (IsJicOrJialc(instr2)) { in target_at()
864 imm = CreateTargetAddress(instr1, instr2); in target_at()
866 imm = GetLuiOriImmediate(instr1, instr2); in target_at()
983 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at_put() local
984 DCHECK(IsOri(instr2) || IsJicOrJialc(instr2)); in target_at_put()
987 DCHECK(IsLui(instr1) && (IsJicOrJialc(instr2) || IsOri(instr2))); in target_at_put()
989 instr2 &= ~kImm16Mask; in target_at_put()
991 if (IsJicOrJialc(instr2)) { in target_at_put()
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| D | assembler-mips.h | 1553 static int32_t GetLuiOriImmediate(Instr instr1, Instr instr2);
1798 Address offset_lui, Instr instr2,
1801 Address offset_lui, Instr instr2,
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| D | assembler-ppc-inl.h | 279 Instr instr2 = instr_at(pc + kInstrSize); in target_address_at() local
281 if (IsLis(instr1) && IsOri(instr2)) { in target_address_at()
287 static_cast<uint32_t>(instr2 & kImm16Mask)); in target_address_at()
294 (instr2 & kImm16Mask)); in target_address_at()
393 Instr instr2 = instr_at(pc + kInstrSize); in PatchConstantPoolAccessInstruction() local
396 instr2 &= ~kImm16Mask; in PatchConstantPoolAccessInstruction()
397 instr2 |= (lo_word & kImm16Mask); in PatchConstantPoolAccessInstruction()
399 instr_at_put(pc + kInstrSize, instr2); in PatchConstantPoolAccessInstruction()
456 Instr instr2 = instr_at(pc + kInstrSize); in set_target_address_at() local
458 if (IsLis(instr1) && IsOri(instr2)) { in set_target_address_at()
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| D | assembler-ppc.cc | 338 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12() argument
346 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C) && in Is64BitLoadIntoR12()
352 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12() argument
356 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C)); in Is32BitLoadIntoR12()
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| D | assembler-ppc.h | 1267 static bool Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3,
1270 static bool Is32BitLoadIntoR12(Instr instr1, Instr instr2);
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_opt_vectorize.c | 116 const nir_instr *instr2 = (nir_instr *) data2; in instrs_equal() local
118 assert(instr2->type == nir_instr_type_alu); in instrs_equal()
121 nir_alu_instr *alu2 = nir_instr_as_alu(instr2); in instrs_equal()
188 instr_try_combine(struct set *instr_set, nir_instr *instr1, nir_instr *instr2) in instr_try_combine() argument
191 assert(instr2->type == nir_instr_type_alu); in instr_try_combine()
193 nir_alu_instr *alu2 = nir_instr_as_alu(instr2); in instr_try_combine()
200 assert(instr1->pass_flags == instr2->pass_flags); in instr_try_combine()
317 nir_instr_remove(instr2); in instr_try_combine()
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| D | nir_instr_set.c | 551 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal() argument
553 assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2)); in nir_instrs_equal()
555 if (instr1->type != instr2->type) in nir_instrs_equal()
561 nir_alu_instr *alu2 = nir_instr_as_alu(instr2); in nir_instrs_equal()
604 nir_deref_instr *deref2 = nir_instr_as_deref(instr2); in nir_instrs_equal()
650 nir_tex_instr *tex2 = nir_instr_as_tex(instr2); in nir_instrs_equal()
683 nir_load_const_instr *load2 = nir_instr_as_load_const(instr2); in nir_instrs_equal()
705 nir_phi_instr *phi2 = nir_instr_as_phi(instr2); in nir_instrs_equal()
725 nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2); in nir_instrs_equal()
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| D | nir.h | 4161 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_nir_vectorize_vs_inputs.c | 97 r600_io_access_same_var(const nir_instr *instr1, const nir_instr *instr2) in r600_io_access_same_var() argument
100 instr2->type == nir_instr_type_intrinsic); in r600_io_access_same_var()
103 nir_intrinsic_instr *intr2 = nir_instr_as_intrinsic(instr2); in r600_io_access_same_var()
221 const nir_instr *instr2 = *(nir_instr **)util_dynarray_begin(arr2); in r600_cmp_func() local
223 return r600_io_access_same_var(instr1, instr2); in r600_cmp_func()
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| D | assembler-riscv64-inl.h | 243 Instr instr2 = Assembler::instr_at(pc + kInstrSize); in relative_code_target_object_handle_at() local
245 DCHECK(IsJalr(instr2)); in relative_code_target_object_handle_at()
246 int32_t code_target_index = BrachlongOffset(instr1, instr2); in relative_code_target_object_handle_at()
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| D | assembler-riscv64.cc | 3846 Instruction* instr2 = Instruction::At((unsigned char*)(pc + 2 * kInstrSize)); in target_address_at() local
3855 IsSlli(*reinterpret_cast<Instr*>(instr2)) && in target_address_at()
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| /third_party/node/deps/v8/src/codegen/s390/ |
| D | assembler-s390.cc | 446 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP() argument
448 return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9)); in Is64BitLoadIntoIP()
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| D | assembler-s390.h | 1340 static bool Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2);
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_lower_to_hw_instr.cpp | 2104 const aco_ptr<Instruction>& instr2 = block->instructions[k]; in lower_to_hw_instr() local
2105 if (instr2->opcode == aco_opcode::s_endpgm || in lower_to_hw_instr()
2106 instr2->opcode == aco_opcode::p_logical_end) in lower_to_hw_instr()
2108 else if (instr2->opcode == aco_opcode::exp && in lower_to_hw_instr()
2109 instr2->exp().dest == null_exp_dest) in lower_to_hw_instr()
2111 else if (instr2->opcode == aco_opcode::p_parallelcopy && in lower_to_hw_instr()
2112 instr2->definitions[0].isFixed() && in lower_to_hw_instr()
2113 instr2->definitions[0].physReg() == exec) in lower_to_hw_instr()
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | assembler-loong64.cc | 2284 Instr instr2 = instr_at(pc + 2 * kInstrSize); in target_address_at() local
2288 DCHECK((IsLu12i_w(instr0) && (IsOri(instr1)) && (IsLu32i_d(instr2)))); in target_address_at()
2291 uint64_t hi20 = ((uint64_t)(instr2 >> 5) & 0xfffff) << 32; in target_address_at()
2320 Instr instr2 = instr_at(pc + kInstrSize * 2); in set_target_value_at() local
2321 DCHECK(IsLu12i_w(instr0) && IsOri(instr1) && IsLu32i_d(instr2) || in set_target_value_at()
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| /third_party/icu/icu4c/source/test/intltest/ |
| D | regextst.cpp | 783 UnicodeString instr2 = "not abc"; in API_Match() local
794 m1->reset(instr2); in API_Match()
796 REGEX_ASSERT(m1->input() == instr2); in API_Match()
838 m1->reset(instr2); in API_Match()
879 m1->reset(instr2); // "not abc" in API_Match()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| D | code-generator-arm.cc | 386 #define ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2) \ argument
394 __ instr2(i.TempRegister(2), r3, Operand(i.InputRegister(1))); \
3476 #define ATOMIC_ARITH_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
3479 ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2); \ in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| D | code-generator-ia32.cc | 453 #define ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ argument
464 __ instr2(i.InputRegister(1), edx); \
3642 #define ATOMIC_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() argument
3645 ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ in AssembleArchInstruction()
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