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Searched refs:ir_type (Results 1 – 25 of 80) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/r600/
Devergreen_compute.c442 shader->ir_type = cso->ir_type; in evergreen_create_compute_state()
444 if (shader->ir_type == PIPE_SHADER_IR_TGSI || in evergreen_create_compute_state()
445 shader->ir_type == PIPE_SHADER_IR_NIR) { in evergreen_create_compute_state()
446 shader->sel = r600_create_shader_state_tokens(ctx, cso->prog, cso->ir_type, PIPE_SHADER_COMPUTE); in evergreen_create_compute_state()
487 if (shader->ir_type == PIPE_SHADER_IR_TGSI || in evergreen_delete_compute_state()
488 shader->ir_type == PIPE_SHADER_IR_NIR) { in evergreen_delete_compute_state()
512 if (cstate->ir_type == PIPE_SHADER_IR_TGSI || in evergreen_bind_compute_state()
513 cstate->ir_type == PIPE_SHADER_IR_NIR) { in evergreen_bind_compute_state()
616 if (shader->ir_type != PIPE_SHADER_IR_TGSI && in evergreen_emit_dispatch()
617 shader->ir_type != PIPE_SHADER_IR_NIR) in evergreen_emit_dispatch()
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Devergreen_compute_internal.h75 enum pipe_shader_ir ir_type; member
Dr600_pipe_common.c910 enum pipe_shader_ir ir_type) in get_max_threads_per_block() argument
912 if (ir_type != PIPE_SHADER_IR_TGSI && in get_max_threads_per_block()
913 ir_type != PIPE_SHADER_IR_NIR) in get_max_threads_per_block()
921 enum pipe_shader_ir ir_type, in r600_get_compute_param() argument
958 unsigned threads_per_block = get_max_threads_per_block(rscreen, ir_type); in r600_get_compute_param()
968 *max_threads_per_block = get_max_threads_per_block(rscreen, ir_type); in r600_get_compute_param()
983 r600_get_compute_param(screen, ir_type, in r600_get_compute_param()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shaderlib_tgsi.c179 state.ir_type = PIPE_SHADER_IR_TGSI; in si_create_dma_compute_shader()
399 state.ir_type = PIPE_SHADER_IR_TGSI; in si_create_query_result_cs()
433 state.ir_type = PIPE_SHADER_IR_TGSI; in si_clear_render_target_shader()
468 state.ir_type = PIPE_SHADER_IR_TGSI; in si_clear_render_target_shader_1d_array()
503 state.ir_type = PIPE_SHADER_IR_TGSI; in si_clear_12bytes_buffer_shader()
563 state.ir_type = PIPE_SHADER_IR_TGSI; in si_create_fmask_expand_cs()
785 state.ir_type = PIPE_SHADER_IR_TGSI; in gfx10_create_sh_query_result_cs()
Dsi_compute.c64 if (program->ir_type != PIPE_SHADER_IR_NATIVE) in si_compute_get_code_object()
127 assert(program->ir_type == PIPE_SHADER_IR_NIR); in si_create_compute_state_async()
247 program->ir_type = cso->ir_type; in si_create_compute_state()
251 if (cso->ir_type != PIPE_SHADER_IR_NATIVE) { in si_create_compute_state()
252 if (cso->ir_type == PIPE_SHADER_IR_TGSI) { in si_create_compute_state()
253 program->ir_type = PIPE_SHADER_IR_NIR; in si_create_compute_state()
256 assert(cso->ir_type == PIPE_SHADER_IR_NIR); in si_create_compute_state()
306 if (program->ir_type != PIPE_SHADER_IR_NATIVE) in si_bind_compute_state()
515 if (program->ir_type != PIPE_SHADER_IR_NATIVE) { in si_switch_compute_shader()
556 if (program->ir_type == PIPE_SHADER_IR_NATIVE) { in si_switch_compute_shader()
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Dsi_get.c802 static unsigned get_max_threads_per_block(struct si_screen *screen, enum pipe_shader_ir ir_type) in get_max_threads_per_block() argument
804 if (ir_type == PIPE_SHADER_IR_NATIVE) in get_max_threads_per_block()
811 static int si_get_compute_param(struct pipe_screen *screen, enum pipe_shader_ir ir_type, in si_get_compute_param() argument
848 unsigned threads_per_block = get_max_threads_per_block(sscreen, ir_type); in si_get_compute_param()
858 *max_threads_per_block = get_max_threads_per_block(sscreen, ir_type); in si_get_compute_param()
873 si_get_compute_param(screen, ir_type, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, in si_get_compute_param()
948 if (ir_type == PIPE_SHADER_IR_NATIVE) in si_get_compute_param()
Dsi_compute.h35 unsigned ir_type; member
/third_party/mesa3d/src/compiler/glsl/
Dir.h93 enum ir_node_type ir_type; variable
116 return ir_type == ir_type_dereference_array || in is_rvalue()
117 ir_type == ir_type_dereference_record || in is_rvalue()
118 ir_type == ir_type_dereference_variable || in is_rvalue()
119 ir_type == ir_type_constant || in is_rvalue()
120 ir_type == ir_type_expression || in is_rvalue()
121 ir_type == ir_type_swizzle || in is_rvalue()
122 ir_type == ir_type_texture; in is_rvalue()
127 return ir_type == ir_type_dereference_array || in is_dereference()
128 ir_type == ir_type_dereference_record || in is_dereference()
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Dlower_vector_derefs.cpp59 if (!ir->lhs || ir->lhs->ir_type != ir_type_dereference_array) in visit_enter()
113 if (new_lhs->ir_type != ir_type_swizzle) { in visit_enter()
153 if (new_lhs->ir_type != ir_type_swizzle) { in visit_enter()
171 if (*rv == NULL || (*rv)->ir_type != ir_type_dereference_array) in handle_rvalue()
Dopt_rebalance_tree.cpp222 if (ir->ir_type == ir_type_dereference_array || in is_reduction()
223 ir->ir_type == ir_type_dereference_record) { in is_reduction()
Dopt_dead_builtin_variables.cpp39 if (var->ir_type != ir_type_variable || var->data.used) in optimize_dead_builtin_variables()
Dlower_jumps.cpp398 else if(ir->ir_type == ir_type_loop_jump) { in get_jump_strength()
403 } else if(ir->ir_type == ir_type_return) in get_jump_strength()
901 assert (jump->ir_type == ir_type_return); in visit()
Dlower_int64.cpp332 assert(callee != NULL && callee->ir_type == ir_type_function_signature); in handle_op()
349 if (*rvalue == NULL || (*rvalue)->ir_type != ir_type_expression) in handle_rvalue()
Dlower_tess_level.cpp252 if (ir->lhs->ir_type != ir_type_expression) in fix_lhs()
262 assert(expr->operands[0]->ir_type == ir_type_dereference_variable); in fix_lhs()
Dopt_constant_folding.cpp67 if (*rvalue == NULL || (*rvalue)->ir_type == ir_type_constant) in ir_constant_fold()
Dlower_vector_insert.cpp61 if (*rv == NULL || (*rv)->ir_type != ir_type_expression) in handle_rvalue()
Dir_array_refcount.cpp138 while (rv->ir_type == ir_type_dereference_array) { in visit_enter()
Dlower_distance.cpp401 if (ir->lhs->ir_type == ir_type_expression) { in fix_lhs()
410 assert(expr->operands[0]->ir_type == ir_type_dereference_array); in fix_lhs()
/third_party/mesa3d/src/gallium/drivers/svga/
Dsvga_pipe_cs.c57 if (templ->ir_type == PIPE_SHADER_IR_NIR) { in svga_create_compute_state()
60 assert(templ->ir_type == PIPE_SHADER_IR_TGSI); in svga_create_compute_state()
64 assert(templ->ir_type == PIPE_SHADER_IR_TGSI); in svga_create_compute_state()
67 shader->type = templ->ir_type; in svga_create_compute_state()
/third_party/mesa3d/src/compiler/glsl/tests/
Dlower_int64_test.cpp155 EXPECT_EQ(ir_type_variable, ir->ir_type); in check_instructions()
165 EXPECT_EQ(ir_type_assignment, ir->ir_type); in check_instructions()
174 EXPECT_EQ(ir_type_variable, ir->ir_type); in check_instructions()
180 EXPECT_EQ(ir_type_assignment, ir->ir_type); in check_instructions()
421 ASSERT_EQ(ir_type_dereference_variable, deref->ir_type); in TEST_F()
/third_party/mesa3d/src/gallium/drivers/panfrost/
Dpan_compute.c59 if (cso->ir_type == PIPE_SHADER_IR_NIR_SERIALIZED) { in panfrost_create_compute_state()
70 assert(cso->ir_type == PIPE_SHADER_IR_NIR && "TGSI kernels unsupported"); in panfrost_create_compute_state()
/third_party/mesa3d/src/gallium/drivers/freedreno/ir3/
Dir3_gallium.c288 if (cso->ir_type == PIPE_SHADER_IR_NIR) { in ir3_shader_compute_state_create()
291 } else if (cso->ir_type == PIPE_SHADER_IR_NIR_SERIALIZED) { in ir3_shader_compute_state_create()
302 assert(cso->ir_type == PIPE_SHADER_IR_TGSI); in ir3_shader_compute_state_create()
/third_party/mesa3d/src/gallium/drivers/softpipe/
Dsp_state_shader.c416 if (templ->ir_type == PIPE_SHADER_IR_NIR) { in softpipe_create_compute_state()
424 assert(templ->ir_type == PIPE_SHADER_IR_TGSI); in softpipe_create_compute_state()
/third_party/mesa3d/src/gallium/auxiliary/util/
Du_compute.c72 state.ir_type = PIPE_SHADER_IR_TGSI; in blit_compute_shader()
/third_party/mesa3d/src/gallium/drivers/tegra/
Dtegra_screen.c114 enum pipe_shader_ir ir_type, in tegra_screen_get_compute_param() argument
120 return screen->gpu->get_compute_param(screen->gpu, ir_type, param, in tegra_screen_get_compute_param()

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