| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 70 if (MO.isReg() && MO.isUse() && MO.readsReg()) in canTurnIntoImplicitDef()
110 if (MO.isUse()) in processImplicitDef()
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| D | RegAllocFast.cpp | 372 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
797 if (LRI->LastUse != &MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse()) in defineVirtReg()
824 if (MO.isUse()) in reloadVirtReg()
896 if (MO.isEarlyClobber() || (MO.isUse() && MO.isTied()) || in handleThroughOperands()
926 if (MO.isUse()) { in handleThroughOperands()
1051 if (MO.isUse()) { in allocateInstruction()
1063 if (MO.isUse()) { in allocateInstruction()
1101 if (MO.isUse()) { in allocateInstruction()
1125 if (!MO.isReg() || !MO.isUse()) in allocateInstruction()
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| D | ReachingDefAnalysis.cpp | 109 if (MO.isUse()) in processDefs()
238 if (!MO.isReg() || !MO.isUse() || MO.getReg() != PhysReg) in getReachingLocalUses()
317 if (MO.isReg() && MO.isUse() && MO.getReg() == PhysReg) in getInstWithUseBefore()
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| D | TwoAddressInstructionPass.cpp | 236 if (MO.isUse() && MOReg != SavedReg) in sink3AddrInstruction()
395 if (MO.isUse() && DI->second < LastUse) in noUseAfterLastDef()
505 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) in isTwoAddrUse()
1096 if (MO.isUse()) { in rescheduleKillAboveMI()
1135 if (MO.isUse()) { in rescheduleKillAboveMI()
1401 if (MO.isUse()) { in tryInstructionTransform()
1480 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1592 assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() && in processTiedPairs()
1617 if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) { in processTiedPairs()
1657 if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) { in processTiedPairs()
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| D | MachineInstr.cpp | 280 if (NewMO->isUse()) { in addOperand()
847 if (getOperand(OpIdx).isUse() && isRegTiedToDefOperand(OpIdx, &DefIdx)) in getRegClassConstraint()
934 if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.getReg() == Reg) in hasRegisterImplicitUseOperand()
947 if (!MO.isReg() || !MO.isUse()) in findRegisterUseOperandIdx()
975 if (MO.isUse()) in readsWritesVirtualRegister()
1054 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1086 if (MO.isUse()) in findTiedOperandIdx()
1091 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
1134 if (MO.isReg() && MO.isUse()) in clearKillInfo()
1388 if (!MO.isReg() || MO.isUse()) in allDefsAreDead()
[all …]
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| D | LiveIntervals.cpp | 792 if (MO.isUse()) { in addKillFlags()
864 float LiveIntervals::getSpillWeight(bool isDef, bool isUse, in getSpillWeight() argument
867 return getSpillWeight(isDef, isUse, MBFI, MI.getParent()); in getSpillWeight()
870 float LiveIntervals::getSpillWeight(bool isDef, bool isUse, in getSpillWeight() argument
875 return (isDef + isUse) * (Freq.getFrequency() * Scale); in getSpillWeight()
992 if (MO.isUse()) { in updateAllRanges()
1076 if (MOP.isReg() && MOP.isUse()) in handleMoveDown()
1377 if (MO->isReg() && !MO->isUse()) in handleMoveUp()
1573 } else if (MO.isUse()) { in repairOldRegInRange()
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| D | MachineSink.cpp | 465 if (!MO.isReg() || !MO.isUse()) in isWorthBreakingCriticalEdge()
670 if (MO.isUse()) { in FindSuccToSinkTo()
682 if (MO.isUse()) continue; in FindSuccToSinkTo()
1022 if (MO.isReg() && MO.isUse()) in SinkInstruction()
1252 } else if (MO.isUse()) { in hasRegisterDependency()
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| D | CriticalAntiDepBreaker.cpp | 242 if (MO.isUse() && Special) { in PrescanInstruction()
318 if (!MO.isUse()) continue; in ScanInstruction()
628 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
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| D | DeadMachineInstructionElim.cpp | 171 if (MO.isReg() && MO.isUse()) { in runOnMachineFunction()
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| D | MachineCSE.cpp | 169 if (!MO.isReg() || !MO.isUse()) in INITIALIZE_PASS_DEPENDENCY()
242 if (MO.isUse()) in isPhysDefTriviallyDead()
467 if (MO.isReg() && MO.isUse() && Register::isVirtualRegister(MO.getReg())) { in isProfitableToCSE()
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| D | RegisterScavenging.cpp | 141 if (MO.isUse()) { in determineKillsAndDefs()
211 if (MO.isUse()) { in forward()
545 if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) && in scavengeRegister()
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| D | ExpandPostRAPseudos.cpp | 80 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) && in LowerSubregToReg()
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| D | LiveRangeShrink.cpp | 144 if (MO.isUse()) in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 263 if (MO.isUse()) { in delayHasHazard()
304 assert(Reg.isUse() && "CALL first operand is not a use."); in insertCallDefsUses()
311 assert(Operand1.isUse() && "CALLrr second operand is not a use."); in insertCallDefsUses()
332 if (MO.isUse()) { in insertDefsUses()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiDelaySlotFiller.cpp | 215 if (MO.isUse()) { in delayHasHazard()
241 else if (MO.isUse()) in insertDefsUses()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 56 if (RegMO.isUse()) { in constrainOperandRegClass()
92 assert((!isTargetSpecificOpcode(II.getOpcode()) || RegMO.isUse()) && in constrainOperandRegClass()
149 if (MO.isUse()) { in constrainSelectedInstRegOperands()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 980 if ((!ReturnUses && op->isUse()) || in defusechain_iterator()
994 if (Op->isUse()) in advance()
1086 if ((!ReturnUses && op->isUse()) || in defusechain_instr_iterator()
1100 if (Op->isUse()) in advance()
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| D | LiveIntervals.h | 105 static float getSpillWeight(bool isDef, bool isUse,
110 static float getSpillWeight(bool isDef, bool isUse,
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| D | LiveRegUnits.h | 66 assert(O->isUse() && "Reg operand not a def and not a use"); in accumulateUsedDefed()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonNewValueJump.cpp | 178 (II->getOperand(i).isUse() || II->getOperand(i).isDef())) { in INITIALIZE_PASS_DEPENDENCY()
653 if (!MO.isReg() || !MO.isUse()) in runOnMachineFunction()
660 if (!Op.isReg() || !Op.isUse() || !Op.isKill()) in runOnMachineFunction()
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| D | HexagonGenPredicate.cpp | 259 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor()
355 if (MO.isReg() && MO.isUse()) in isScalarPred()
376 if (!MO.isReg() || !MO.isUse()) in convertToPredForm()
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| D | HexagonSubtarget.cpp | 242 if (MO.isUse() && !MI->isCopy() && in apply()
352 if (MO.isReg() && MO.getReg() && MO.isUse() && MO.getReg() == DReg) { in adjustSchedDependency()
435 if (MO.isReg() && MO.isUse() && MO.getReg() == DepR) { in restoreLatency()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FixupBWInsts.cpp | 264 assert((MO.isDef() || MO.isUse()) && "Expected Def or Use only!"); in getSuperRegDestIfDead()
273 if (MO.isUse() && !TRI->isSubRegisterEq(OrigDestReg, MO.getReg()) && in getSuperRegDestIfDead()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMIChecking.cpp | 115 if (!MO.isReg() || MO.isUse()) in hasLiveDefs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegColoring.cpp | 70 Weight += LiveIntervals::getSpillWeight(MO.isDef(), MO.isUse(), MBFI, in computeWeight()
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