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Searched refs:kSimd128RegZero (Results 1 – 11 of 11) sorted by relevance

/third_party/node/deps/v8/src/wasm/baseline/mips64/
Dliftoff-assembler-mips64.h2035 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in LoadTransform()
2037 ilvr_b(dst_msa, kSimd128RegZero, dst_msa); in LoadTransform()
2043 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in LoadTransform()
2045 ilvr_h(dst_msa, kSimd128RegZero, dst_msa); in LoadTransform()
2051 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in LoadTransform()
2053 ilvr_w(dst_msa, kSimd128RegZero, dst_msa); in LoadTransform()
2147 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in emit_i8x16_swizzle()
2149 vshf_b(dst_msa, kSimd128RegZero, lhs_msa); in emit_i8x16_swizzle()
2351 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in emit_i64x2_abs()
2352 add_a_d(dst.fp().toW(), src.fp().toW(), kSimd128RegZero); in emit_i64x2_abs()
[all …]
/third_party/node/deps/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc1796 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in AssembleArchInstruction()
1799 __ ilvr_b(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
1815 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in AssembleArchInstruction()
1818 __ ilvr_h(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
1834 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in AssembleArchInstruction()
1837 __ ilvr_w(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
2138 Simd128Register scratch0 = kSimd128RegZero; in AssembleArchInstruction()
2161 Simd128Register scratch0 = kSimd128RegZero; in AssembleArchInstruction()
2283 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in AssembleArchInstruction()
2284 __ ilvr_w(kSimd128RegZero, kSimd128RegZero, i.InputSimd128Register(0)); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc532 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); \
533 __ op0(kSimd128ScratchReg, kSimd128RegZero, i.InputSimd128Register(0)); \
534 __ op0(kSimd128RegZero, kSimd128RegZero, i.InputSimd128Register(1)); \
535 __ op1(i.OutputSimd128Register(), kSimd128ScratchReg, kSimd128RegZero); \
1730 __ ilvr_b(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
1757 __ ilvr_h(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
1784 __ ilvr_w(dst, kSimd128RegZero, dst); in AssembleArchInstruction()
2192 __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); in AssembleArchInstruction()
2193 __ ilvr_w(kSimd128RegZero, kSimd128RegZero, i.InputSimd128Register(0)); in AssembleArchInstruction()
2194 __ slli_d(kSimd128RegZero, kSimd128RegZero, 32); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
Dliftoff-assembler-riscv64.h1920 vmv_vv(dst_v, kSimd128RegZero); in emit_i8x16_popcnt()
1923 vmsne_vv(v0, kSimd128ScratchReg, kSimd128RegZero); in emit_i8x16_popcnt()
2164 vmv_vx(kSimd128RegZero, zero_reg); in emit_i64x2_bitmask()
2165 vmslt_vv(kSimd128ScratchReg, src.fp().toV(), kSimd128RegZero); in emit_i64x2_bitmask()
2504 vmv_vx(kSimd128RegZero, zero_reg); in emit_i8x16_bitmask()
2505 vmslt_vv(kSimd128ScratchReg, src.fp().toV(), kSimd128RegZero); in emit_i8x16_bitmask()
2642 vmv_vx(kSimd128RegZero, zero_reg); in emit_i16x8_bitmask()
2643 vmslt_vv(kSimd128ScratchReg, src.fp().toV(), kSimd128RegZero); in emit_i16x8_bitmask()
2786 vmv_vx(kSimd128RegZero, zero_reg); in emit_i32x4_bitmask()
2787 vmslt_vv(kSimd128ScratchReg, src.fp().toV(), kSimd128RegZero); in emit_i32x4_bitmask()
[all …]
/third_party/node/deps/v8/src/compiler/backend/riscv64/
Dcode-generator-riscv64.cc2405 __ vmv_vx(kSimd128RegZero, zero_reg); in AssembleArchInstruction()
2406 __ vmslt_vv(v0, i.InputSimd128Register(0), kSimd128RegZero); in AssembleArchInstruction()
2414 __ vmv_vx(kSimd128RegZero, zero_reg); in AssembleArchInstruction()
2415 __ vmslt_vv(v0, i.InputSimd128Register(0), kSimd128RegZero); in AssembleArchInstruction()
2422 __ vmv_vx(kSimd128RegZero, zero_reg); in AssembleArchInstruction()
2424 __ vmslt_vv(v0, i.InputSimd128Register(0), kSimd128RegZero); in AssembleArchInstruction()
2432 __ vmv_vx(kSimd128RegZero, zero_reg); in AssembleArchInstruction()
2433 __ vmslt_vv(v0, i.InputSimd128Register(0), kSimd128RegZero); in AssembleArchInstruction()
2648 __ vmv_vx(kSimd128RegZero, zero_reg); in AssembleArchInstruction()
2649 __ vmslt_vv(kSimd128ScratchReg, src, kSimd128RegZero); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/wasm/baseline/mips/
Dliftoff-assembler-mips.h1873 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); \
1874 ilv_instr(kSimd128ScratchReg, kSimd128RegZero, src1_msa); \
1875 ilv_instr(kSimd128RegZero, kSimd128RegZero, src2_msa); \
1876 dotp_instr(dst_msa, kSimd128ScratchReg, kSimd128RegZero); \
/third_party/node/deps/v8/src/codegen/mips/
Dregister-mips.h211 constexpr Simd128Register kSimd128RegZero = w28; variable
/third_party/node/deps/v8/src/codegen/riscv64/
Dregister-riscv64.h303 constexpr VRegister kSimd128RegZero = v25; variable
/third_party/node/deps/v8/src/codegen/mips64/
Dregister-mips64.h222 constexpr Simd128Register kSimd128RegZero = w28; variable
Dmacro-assembler-mips64.cc2678 xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); \ in CallRecordWriteStub()
2679 ilv_instr(kSimd128ScratchReg, kSimd128RegZero, src1); \ in CallRecordWriteStub()
2680 ilv_instr(kSimd128RegZero, kSimd128RegZero, src2); \ in CallRecordWriteStub()
2681 dotp_instr(dst, kSimd128ScratchReg, kSimd128RegZero); \ in CallRecordWriteStub()
/third_party/node/deps/v8/src/codegen/ppc/
Dregister-ppc.h235 constexpr Simd128Register kSimd128RegZero = v14; variable