/third_party/node/deps/openssl/config/archs/linux64-mips64/asm/crypto/aes/ |
D | aes-mips.S | 327 lbu $12,2($1) # Te4[s1>>16] 329 lbu $13,2($2) # Te4[s2>>16] 331 lbu $14,2($24) # Te4[s3>>16] 333 lbu $15,2($25) # Te4[s0>>16] 346 lbu $16,2($1) # Te4[s2>>8] 348 lbu $17,2($2) # Te4[s3>>8] 350 lbu $18,2($24) # Te4[s0>>8] 352 lbu $19,2($25) # Te4[s1>>8] 355 lbu $20,2($1) # Te4[s0>>24] 357 lbu $21,2($2) # Te4[s1>>24] [all …]
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/third_party/node/deps/openssl/config/archs/linux64-mips64/asm_avx2/crypto/aes/ |
D | aes-mips.S | 327 lbu $12,2($1) # Te4[s1>>16] 329 lbu $13,2($2) # Te4[s2>>16] 331 lbu $14,2($24) # Te4[s3>>16] 333 lbu $15,2($25) # Te4[s0>>16] 346 lbu $16,2($1) # Te4[s2>>8] 348 lbu $17,2($2) # Te4[s3>>8] 350 lbu $18,2($24) # Te4[s0>>8] 352 lbu $19,2($25) # Te4[s1>>8] 355 lbu $20,2($1) # Te4[s0>>24] 357 lbu $21,2($2) # Te4[s1>>24] [all …]
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/third_party/node/deps/v8/src/regexp/mips/ |
D | regexp-macro-assembler-mips.cc | 266 __ lbu(a3, MemOperand(a0, 0)); in CheckNotBackReferenceIgnoreCase() local 268 __ lbu(t0, MemOperand(a2, 0)); in CheckNotBackReferenceIgnoreCase() local 396 __ lbu(a3, MemOperand(a0, 0)); in CheckNotBackReference() local 398 __ lbu(t0, MemOperand(a2, 0)); in CheckNotBackReference() local 512 __ lbu(a0, FieldMemOperand(a0, ByteArray::kHeaderSize)); in CheckBitInTable() local 592 __ lbu(a0, MemOperand(a0, 0)); in CheckSpecialCharacterClass() local 605 __ lbu(a0, MemOperand(a0, 0)); in CheckSpecialCharacterClass() local 1346 __ lbu(current_character(), MemOperand(t5, 0)); in LoadCurrentCharacterUnchecked() local
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/third_party/node/deps/v8/src/codegen/mips/ |
D | macro-assembler-mips.cc | 1080 lbu(scratch, source); in CallRecordWriteStub() 1083 lbu(scratch, MemOperand(source.rm(), source.offset() + 1)); in CallRecordWriteStub() 1087 lbu(scratch, source); in CallRecordWriteStub() 1090 lbu(scratch, MemOperand(source.rm(), source.offset() + 1)); in CallRecordWriteStub() 1114 lbu(rd, MemOperand(source.rm(), source.offset() + 1)); in CallRecordWriteStub() 1115 lbu(scratch, source); in CallRecordWriteStub() 1117 lbu(rd, source); in CallRecordWriteStub() 1118 lbu(scratch, MemOperand(source.rm(), source.offset() + 1)); in CallRecordWriteStub() 1122 lbu(scratch, source); in CallRecordWriteStub() 1123 lbu(rd, MemOperand(source.rm(), source.offset() + 1)); in CallRecordWriteStub() [all …]
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D | assembler-mips.h | 541 void lbu(Register rd, const MemOperand& rs);
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D | assembler-mips.cc | 2064 void Assembler::lbu(Register rd, const MemOperand& rs) { in lbu() function in v8::internal::Assembler
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/third_party/node/deps/v8/src/builtins/mips/ |
D | builtins-mips.cc | 963 __ lbu(bytecode, MemOperand(scratch2)); in AdvanceBytecodeOffsetOrReturn() local 972 __ lbu(bytecode, MemOperand(scratch2)); in AdvanceBytecodeOffsetOrReturn() local 1339 __ lbu(t3, MemOperand(a0)); in Generate_InterpreterEntryTrampoline() local 1358 __ lbu(a1, MemOperand(a1)); in Generate_InterpreterEntryTrampoline() local 1639 __ lbu(t3, MemOperand(a1)); in Generate_InterpreterEnterBytecode() local 1663 __ lbu(a1, MemOperand(a1)); in Generate_InterpreterEnterAtNextBytecode() local 2122 __ lbu(t1, FieldMemOperand(t1, Map::kBitFieldOffset)); in Generate_CallOrConstructForwardVarargs() local 2372 __ lbu(flags, FieldMemOperand(map, Map::kBitFieldOffset)); in Generate_Call() local 2549 __ lbu(flags, FieldMemOperand(map, Map::kBitFieldOffset)); in Generate_Construct() local
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/third_party/elfutils/tests/ |
D | testfile-riscv64-dis1.expect.bz2 | ... (s8)
48 ac: 03 40 00 00 lbu zero,0(zero)
49 b0: 03 ... |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfo.td | 400 def LBU : Load_ri<0b100, "lbu">, Sched<[WriteLDB, ReadMemBase]>; 575 def PseudoLBU : PseudoLoad<"lbu">; 693 def : InstAlias<"lbu $rd, (${rs1})",
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/third_party/node/deps/v8/src/codegen/riscv64/ |
D | macro-assembler-riscv64.cc | 1088 lbu(rd, rs.rm(), rs.offset() + (NBYTES - 1)); in LoadNBytes() 1094 lbu(scratch, rs.rm(), rs.offset() + i); in LoadNBytes() 1112 lbu(scratch0, rs.rm(), rs.offset() + (NBYTES - 1)); in LoadNBytesOverwritingBaseReg() 1118 lbu(scratch1, rs.rm(), rs.offset() + i); in LoadNBytesOverwritingBaseReg() 1353 this->lbu(target, source.rm(), source.offset()); in Lbu()
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D | assembler-riscv64.h | 422 void lbu(Register rd, Register rs1, int16_t imm12);
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/third_party/node/deps/v8/src/wasm/baseline/mips/ |
D | liftoff-assembler-mips.h | 566 lbu(dst.gp(), src_op); in Load() 569 lbu(dst.low_gp(), src_op); in Load()
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/third_party/icu/icu4c/source/data/misc/ |
D | likelySubtags.txt | 709 lbu{"lbu_Latn_ZZ"}
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D | langInfo.txt | 967 "lbu","Latn","ZZ",
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/third_party/skia/third_party/externals/icu/source/data/misc/ |
D | likelySubtags.txt | 703 lbu{"lbu_Latn_ZZ"}
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D | langInfo.txt | 956 "lbu","Latn","ZZ",
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenAsmMatcher.inc | 5029 "\003lbu\005lbu16\004lbue\004lbux\002ld\004ld.b\004ld.d\004ld.h\004ld.w\004" 6814 …{ 5434 /* lbu */, Mips::LBu, Convert__GPR32AsmReg1_0__MemOffsetSimmPtr2_1, AMFBS_HasStdEnc_NotInMi… 6815 …{ 5434 /* lbu */, Mips::LBU_MMR6, Convert__GPR32AsmReg1_0__MemOffsetSimm16_02_1, AMFBS_InMicroMips… 6816 …{ 5434 /* lbu */, Mips::LBu_MM, Convert__GPR32AsmReg1_0__MemOffsetSimm16_02_1, AMFBS_InMicroMips, … 10090 { 5434 /* lbu */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_HasStdEnc_NotInMicroMips }, 10091 { 5434 /* lbu */, 2 /* 1 */, MCK_MemOffsetSimmPtr, AMFBS_HasStdEnc_NotInMicroMips }, 10092 { 5434 /* lbu */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_HasMips32r6 }, 10093 { 5434 /* lbu */, 2 /* 1 */, MCK_MemOffsetSimm16_0, AMFBS_InMicroMips_HasMips32r6 }, 10094 { 5434 /* lbu */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips }, 10095 { 5434 /* lbu */, 2 /* 1 */, MCK_MemOffsetSimm16_0, AMFBS_InMicroMips },
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/third_party/node/deps/v8/src/compiler/backend/mips/ |
D | code-generator-mips.cc | 1513 __ lbu(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction() local 1791 ASSEMBLE_ATOMIC_LOAD_INTEGER(lbu); in AssembleArchInstruction()
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/third_party/node/deps/v8/src/wasm/baseline/riscv64/ |
D | liftoff-assembler-riscv64.h | 684 __ lbu(result_reg, actual_addr, 0); in AtomicBinop() 768 lbu(dst.gp(), src_reg, 0); in AtomicLoad()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | Mips64InstrInfo.td | 203 def LBu64 : Load<"lbu", GPR64Opnd, zextloadi8, II_LBU>, LW_FM<0x24>, GPR_64;
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D | MicroMipsInstrInfo.td | 809 def LBu_MM : LoadMemory<"lbu", GPR32Opnd, mem_mm_16, zextloadi8, II_LBU>,
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D | Mips16InstrInfo.td | 798 FEXT_RRI16_mem_ins<0b10100, "lbu", mem16, II_LBU>, MayLoad {
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D | MicroMips32r6InstrInfo.td | 435 class LBU_MMR6_DESC : LB_LBU_MMR6_DESC_BASE<"lbu", mem_mm_16, GPR32Opnd,
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/third_party/node/deps/v8/src/codegen/mips64/ |
D | assembler-mips64.h | 576 void lbu(Register rd, const MemOperand& rs);
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/third_party/node/deps/v8/src/builtins/mips64/ |
D | builtins-mips64.cc | 2175 __ lbu(t1, FieldMemOperand(t1, Map::kBitFieldOffset)); in Generate_CallOrConstructForwardVarargs() local
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