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Searched refs:ldrh (Results 1 – 25 of 61) sorted by relevance

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/third_party/ffmpeg/libavutil/arm/
Dasm.S291 A ldrh \rt, [\rn, \rm]!
293 T ldrh \rt, [\rn]
297 A ldrh \rt, [\rn, -\rm]!
299 T ldrh \rt, [\rn]
303 A ldrh \rt, [\rn], \rm
304 T ldrh \rt, [\rn]
/third_party/ffmpeg/libavcodec/arm/
Dac3dsp_arm.S28 ldrh r12, [r0, r3]
Dmdct_vfp.S101 ldrh J0, [REVTAB], #2
102 ldrh J1, [REVTAB], #2
104 ldrh J3, [REVTAB_HI, #-2]!
105 ldrh J2, [REVTAB_HI, #-2]!
Dsimple_idct_armv5te.S427 ldrh ip, [lr]
/third_party/node/deps/openssl/config/archs/linux-armv4/asm_avx2/crypto/modes/
Dghash-armv4.S69 ldrh r8,[sp,r14] @ rem_4bit[rem]
92 ldrh r8,[sp,r12] @ rem_4bit[rem]
113 ldrh r9,[sp,r14]
230 ldrh r8,[r2,r14] @ rem_4bit[rem]
251 ldrh r8,[r2,r12] @ rem_4bit[rem]
268 ldrh r8,[r2,r14] @ rem_4bit[rem]
/third_party/node/deps/openssl/config/archs/linux-armv4/asm/crypto/modes/
Dghash-armv4.S69 ldrh r8,[sp,r14] @ rem_4bit[rem]
92 ldrh r8,[sp,r12] @ rem_4bit[rem]
113 ldrh r9,[sp,r14]
230 ldrh r8,[r2,r14] @ rem_4bit[rem]
251 ldrh r8,[r2,r12] @ rem_4bit[rem]
268 ldrh r8,[r2,r14] @ rem_4bit[rem]
/third_party/vixl/test/aarch64/
Dtest-disasm-aarch64.cc1094 COMPARE(ldrh(w0, MemOperand(x1, w2, UXTW)), "ldrh w0, [x1, w2, uxtw]"); in TEST()
1095 COMPARE(ldrh(w3, MemOperand(x4, w5, UXTW, 1)), "ldrh w3, [x4, w5, uxtw #1]"); in TEST()
1096 COMPARE(ldrh(w6, MemOperand(x7, x8)), "ldrh w6, [x7, x8]"); in TEST()
1097 COMPARE(ldrh(w9, MemOperand(x10, x11, LSL, 1)), in TEST()
1099 COMPARE(ldrh(w12, MemOperand(x13, w14, SXTW)), "ldrh w12, [x13, w14, sxtw]"); in TEST()
1100 COMPARE(ldrh(w15, MemOperand(x16, w17, SXTW, 1)), in TEST()
1102 COMPARE(ldrh(w18, MemOperand(x19, x20, SXTX)), "ldrh w18, [x19, x20, sxtx]"); in TEST()
1103 COMPARE(ldrh(w21, MemOperand(x22, x23, SXTX, 1)), in TEST()
1164 COMPARE(ldrh(w0, MemOperand(x1)), "ldrh w0, [x1]"); in TEST()
1165 COMPARE(ldrh(x2, MemOperand(x3)), "ldrh w2, [x3]"); in TEST()
[all …]
Dtest-trace-aarch64.cc191 __ ldrh(w5, MemOperand(x0)); in GenerateTestSequenceBase() local
192 __ ldrh(w5, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase() local
193 __ ldrh(w5, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase() local
194 __ ldrh(x6, MemOperand(x0)); in GenerateTestSequenceBase() local
195 __ ldrh(x6, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase() local
196 __ ldrh(x6, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase() local
/third_party/lzma/Asm/arm64/
DLzmaDecOpt.S71 ldrh \dest, [\mem]
74 ldrh \dest, [\mem, \offset]!
77 ldrh \dest, [\mem1, \mem2]
80 ldrh \dest, [\mem1, \mem2, lsl #PSHIFT]
1090 ldrh sym, [t0_R, cnt_R]
1103 ldrh sym, [t0_R, cnt_R]
/third_party/node/deps/v8/src/baseline/arm/
Dbaseline-assembler-arm-inl.h169 __ ldrh(type, FieldMemOperand(map, Map::kInstanceTypeOffset)); in JumpIfObjectType()
182 __ ldrh(type, FieldMemOperand(map, Map::kInstanceTypeOffset)); in JumpIfInstanceType()
377 __ ldrh(output, FieldMemOperand(source, offset));
/third_party/openh264/codec/encoder/core/arm/
Dsvc_motion_estimation.S127 ldrh r10, [r9] // sum of last line of pFeatureOfBlock[i]
203 ldrh r10, [r9] // sum of last line of pFeatureOfBlock[i]
/third_party/openh264/codec/encoder/core/arm64/
Dsvc_motion_estimation_aarch64_neon.S123 ldrh w10, [x9] // sum of last line of pFeatureOfBlock[i]
202 ldrh w10, [x9] // sum of last line of pFeatureOfBlock[i]
/third_party/optimized-routines/string/aarch64/
Dstrcpy-mte.S124 ldrh dataw1, [srcin]
/third_party/node/deps/v8/src/regexp/arm/
Dregexp-macro-assembler-arm.cc402 __ ldrh(r3, MemOperand(r0, char_size(), PostIndex)); in CheckNotBackReference() local
403 __ ldrh(r4, MemOperand(r2, char_size(), PostIndex)); in CheckNotBackReference() local
1320 __ ldrh(current_character(), MemOperand(end_of_input_address(), offset)); in LoadCurrentCharacterUnchecked() local
1331 __ ldrh(current_character(), MemOperand(end_of_input_address(), offset)); in LoadCurrentCharacterUnchecked() local
/third_party/libffi/src/aarch64/
Dsysv.S326 22: ldrh w0, [x3, #BE(6)] /* UINT16 */
Dwin64_armasm.S286 ldrh w0, [x3, #BE(6)] /* UINT16 */
/third_party/node/deps/v8/src/builtins/arm/
Dbuiltins-arm.cc434 __ ldrh(r3, in Generate_ResumeGeneratorTrampoline() local
469 __ ldrh(r0, FieldMemOperand( in Generate_ResumeGeneratorTrampoline() local
1270 __ ldrh(r4, FieldMemOperand(r4, Map::kInstanceTypeOffset)); in Generate_InterpreterEntryTrampoline() local
1430 __ ldrh(r8, FieldMemOperand(r8, Map::kInstanceTypeOffset)); in Generate_InterpreterEntryTrampoline() local
2089 __ ldrh(r6, FieldMemOperand(scratch, Map::kInstanceTypeOffset)); in Generate_CallOrConstructVarargs() local
2307 __ ldrh(r2, in Generate_CallFunction() local
3309 __ ldrh(temp1, MemOperand(src, 2, PostIndex), cs); in Generate_MemCopyUint8Uint8() local
/third_party/optimized-routines/string/arm/
Dstrcmp.S401 ldrh data2, [src2]
/third_party/vixl/src/aarch32/
Dassembler-aarch32.h2491 void ldrh(Condition cond,
2495 void ldrh(Register rt, const MemOperand& operand) { in ldrh() function
2496 ldrh(al, Best, rt, operand); in ldrh()
2498 void ldrh(Condition cond, Register rt, const MemOperand& operand) { in ldrh() function
2499 ldrh(cond, Best, rt, operand); in ldrh()
2501 void ldrh(EncodingSize size, Register rt, const MemOperand& operand) { in ldrh() function
2502 ldrh(al, size, rt, operand); in ldrh()
2505 void ldrh(Condition cond, Register rt, Location* location);
2510 void ldrh(Register rt, Location* location) { ldrh(al, rt, location); } in ldrh() function
/third_party/node/deps/v8/src/codegen/arm/
Dmacro-assembler-arm.cc1762 ldrh(expected_reg, in CallRecordWriteStub()
1828 ldrh(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset)); in CallRecordWriteStub()
1850 ldrh(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset)); in CallRecordWriteStub()
/third_party/skia/src/core/
DSkVM.h352 void ldrh(X dst, X src, int imm12=0); // 16-bit dst = *(src+imm12*2)
360 void ldrh(V dst, X src, int imm12=0); // 16-bit dst = *(src+imm12*2)
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.cc482 void Assembler::ldrh(Register rd, Address ad, Condition cond) { in ldrh() function in dart::Assembler
1900 ldrh(result, FieldAddress(object, class_id_offset), cond); in LoadClassId()
2722 ldrh(reg, Address(base, offset), cond); in LoadFromOffset()
Dassembler_arm.h553 void ldrh(Register rd, Address ad, Condition cond = AL);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td1436 defm t2LDRH : T2I_ld<0, 0b01, "ldrh", IIC_iLoad_bh_i, IIC_iLoad_bh_si,
1530 "ldrh", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>,
1536 "ldrh", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>,
4869 def : t2InstAlias<"ldrh${p} $Rt, $addr",
4880 def : t2InstAlias<"ldrh${p} $Rt, $addr",
4891 def : t2InstAlias<"ldrh${p} $Rt, $addr",
5157 def t2LDRHpcrel : t2AsmPseudo<"ldrh${p} $Rt, $addr",
5168 def : t2InstAlias<"ldrh${p}.w $Rt, $addr",
/third_party/vixl/test/test-trace-reference/
Dlog-disasm135 0x~~~~~~~~~~~~~~~~ 79400005 ldrh w5, [x0]
136 0x~~~~~~~~~~~~~~~~ 78402425 ldrh w5, [x1], #2
137 0x~~~~~~~~~~~~~~~~ 78402c25 ldrh w5, [x1, #2]!
138 0x~~~~~~~~~~~~~~~~ 79400006 ldrh w6, [x0]
139 0x~~~~~~~~~~~~~~~~ 78402426 ldrh w6, [x1], #2
140 0x~~~~~~~~~~~~~~~~ 78402c26 ldrh w6, [x1, #2]!

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