| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_lrz.c | 210 cmd->state.lrz.image_view = view; in tu_lrz_init_state()
215 cmd->state.lrz.valid = true; in tu_lrz_init_state()
216 cmd->state.lrz.prev_direction = TU_LRZ_UNKNOWN; in tu_lrz_init_state()
220 cmd->state.lrz.fast_clear = view->image->lrz_fc_size > 0; in tu_lrz_init_state()
222 cmd->state.lrz.gpu_dir_tracking = has_gpu_tracking; in tu_lrz_init_state()
223 cmd->state.lrz.reuse_previous_state = !clears_depth; in tu_lrz_init_state()
247 cmd->state.lrz.valid = true; in tu_lrz_init_secondary()
248 cmd->state.lrz.prev_direction = TU_LRZ_UNKNOWN; in tu_lrz_init_secondary()
249 cmd->state.lrz.gpu_dir_tracking = has_gpu_tracking; in tu_lrz_init_secondary()
256 cmd->state.lrz.fast_clear = true; in tu_lrz_init_secondary()
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| D | tu_cmd_buffer.h | 392 struct tu_lrz_state lrz; member
499 struct tu_lrz_state lrz; member
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| D | tu_pipeline.h | 194 struct tu_lrz_pipeline lrz; member
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| D | tu_cmd_buffer.c | 1551 cmd_buffer->state.lrz.valid = false; in tu_reset_render_pass()
3419 cmd->state.lrz = suspended->state.suspended_pass.lrz; in tu_restore_suspended_pass()
3549 if (!secondary->state.lrz.valid) in tu_CmdExecuteCommands()
3550 cmd->state.lrz.valid = false; in tu_CmdExecuteCommands()
3664 if (!cmd->state.lrz.gpu_dir_tracking && cmd->state.pass) { in tu_CmdExecuteCommands()
3668 cmd->state.lrz.valid = false; in tu_CmdExecuteCommands()
3982 cmd->state.lrz.valid = false; in tu_CmdBeginRendering()
4059 cmd->state.lrz.valid = false; in tu_CmdNextSubpass2()
4298 if ((cmd->state.pipeline->lrz.fs_has_kill || in tu6_build_depth_plane_z_mode()
4301 zmode = (cmd->state.lrz.valid && cmd->state.lrz.enabled) in tu6_build_depth_plane_z_mode()
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| D | tu_pipeline.c | 1589 pipeline->lrz.fs_has_kill = fs->has_kill; in tu6_emit_fs_outputs()
1590 pipeline->lrz.early_fragment_tests = fs->fs.early_fragment_tests; in tu6_emit_fs_outputs()
1594 pipeline->lrz.force_late_z = true; in tu6_emit_fs_outputs()
3581 pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE; in tu_pipeline_builder_parse_depth_stencil()
3584 pipeline->lrz.force_disable_mask = TU_LRZ_FORCE_DISABLE_LRZ; in tu_pipeline_builder_parse_depth_stencil()
3646 pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE; in tu_pipeline_builder_parse_multisample_and_color_blend()
3659 pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE; in tu_pipeline_builder_parse_multisample_and_color_blend()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_zsa.c | 65 so->lrz.enable = false; in update_lrz_stencil()
66 so->lrz.test = false; in update_lrz_stencil()
71 so->lrz.write = false; in update_lrz_stencil()
78 so->lrz.write = false; in update_lrz_stencil()
83 so->lrz.enable = false; in update_lrz_stencil()
84 so->lrz.test = false; in update_lrz_stencil()
112 so->lrz.test = true; in fd6_zsa_state_create()
115 so->lrz.write = true; in fd6_zsa_state_create()
121 so->lrz.enable = true; in fd6_zsa_state_create()
122 so->lrz.direction = FD_LRZ_LESS; in fd6_zsa_state_create()
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| D | fd6_emit.c | 632 struct fd6_lrz_state lrz; in compute_lrz_state() local
635 memset(&lrz, 0, sizeof(lrz)); in compute_lrz_state()
637 lrz.z_mode = compute_ztest_mode(emit, false); in compute_lrz_state()
639 return lrz; in compute_lrz_state()
646 lrz = zsa->lrz; in compute_lrz_state()
651 lrz.write = false; in compute_lrz_state()
653 lrz.enable = false; in compute_lrz_state()
662 (rsc->lrz_direction != lrz.direction)) { in compute_lrz_state()
668 memset(&lrz, 0, sizeof(lrz)); in compute_lrz_state()
672 lrz.enable = false; in compute_lrz_state()
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| D | fd6_zsa.h | 50 struct fd6_lrz_state lrz; member
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| D | fd6_context.h | 95 struct fd6_lrz_state lrz[2]; member
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| D | fd6_resource.c | 223 rsc->lrz = fd_bo_new(screen->dev, size, FD_BO_NOMAP, "lrz"); in setup_lrz()
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| D | fd6_draw.c | 414 OUT_RELOC(ring, zsbuf->lrz, 0, 0, 0); in fd6_clear_lrz()
497 if (zsbuf->lrz && !is_z32(pfb->zsbuf->format)) { in fd6_clear()
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| D | fd6_gmem.c | 183 if (rsc->lrz) { in emit_zs()
184 OUT_REG(ring, A6XX_GRAS_LRZ_BUFFER_BASE(.bo = rsc->lrz), in emit_zs()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_draw.c | 201 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(fd_bo_size(zsbuf->lrz))); in fd5_clear_lrz()
202 OUT_RELOC(ring, zsbuf->lrz, 0x1000, 0, 0); in fd5_clear_lrz()
333 if (zsbuf->lrz) { in fd5_clear()
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| D | fd5_resource.c | 52 rsc->lrz = fd_bo_new(screen->dev, size, FD_BO_NOMAP, "lrz"); in setup_lrz()
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| D | fd5_gmem.c | 173 if (rsc->lrz) { in emit_zs()
175 OUT_RELOC(ring, rsc->lrz, 0x1000, 0, 0); in emit_zs()
179 OUT_RELOC(ring, rsc->lrz, 0, 0, 0); in emit_zs()
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| D | fd5_emit.c | 575 if (emit->no_lrz_write || !rsc->lrz || !rsc->lrz_valid) in fd5_emit_state()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_resource.h | 169 struct fd_bo *lrz; member
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| D | freedreno_resource.c | 1028 if (rsc->lrz) in fd_resource_destroy()
1029 fd_bo_del(rsc->lrz); in fd_resource_destroy()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 22.2.0.rst | 1355 - tu/lrz: Do not use framebuffer when inheriting LRZ
1374 - tu/lrz: Fix multiple subpass case with secondaries
1375 - tu/lrz: Fix multiple depth attachment case with secondaries
2489 - turnip: fix wrong size for lrz cs when lrz_track_quirk is enabled.
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| D | 20.2.0.rst | 4068 - freedreno/a6xx: add early-lrz-late-z mode
4161 - freedreno/a6xx: don't enable early-z/lrz if no z-test
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| D | 21.2.0.rst | 4706 - turnip/lrz: add support for VK_EXT_extended_dynamic_state
4708 - turnip/lrz: added support for depth bounds test enable
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| D | 20.1.0.rst | 3637 - freedreno/a6xx: fix lrz overflow
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| /third_party/skia/third_party/externals/icu/source/data/misc/ |
| D | supplementalData.txt | 6118 "lrz",
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| /third_party/icu/icu4c/source/data/misc/ |
| D | supplementalData.txt | 6217 "lrz",
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| /third_party/astc-encoder/Test/Images/HDRIHaven/HDR-RGB/ |
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