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Searched refs:misaligned (Results 1 – 25 of 56) sorted by relevance

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/third_party/ffmpeg/libswresample/
Daudioconvert.c196 unsigned misaligned = 0; in swri_audio_convert() local
205 misaligned |= m & ctx->in_simd_align_mask; in swri_audio_convert()
212 misaligned |= m & ctx->out_simd_align_mask; in swri_audio_convert()
217 if(ctx->simd_f && !ctx->ch_map && !misaligned){ in swri_audio_convert()
/third_party/mesa3d/src/gallium/auxiliary/util/
Du_vbuf.c683 uint32_t misaligned) in u_vbuf_translate_begin() argument
689 const unsigned incompatible_vb_mask = (misaligned | mgr->incompatible_vb_mask) & in u_vbuf_translate_begin()
1260 static boolean u_vbuf_need_minmax_index(const struct u_vbuf *mgr, uint32_t misaligned) in u_vbuf_need_minmax_index() argument
1268 misaligned | in u_vbuf_need_minmax_index()
1274 static boolean u_vbuf_mapping_vertex_buffer_blocks(const struct u_vbuf *mgr, uint32_t misaligned) in u_vbuf_mapping_vertex_buffer_blocks() argument
1283 ~misaligned & in u_vbuf_mapping_vertex_buffer_blocks()
1474 uint32_t misaligned = 0; in u_vbuf_draw_vbo() local
1477 misaligned |= mgr->ve->vb_align_mask[i] & mgr->unaligned_vb_mask[i]; in u_vbuf_draw_vbo()
1481 (mgr->incompatible_vb_mask | misaligned) & used_vb_mask; in u_vbuf_draw_vbo()
1679 if (u_vbuf_need_minmax_index(mgr, misaligned)) { in u_vbuf_draw_vbo()
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/third_party/mesa3d/docs/relnotes/
D8.0.5.rst239 - i965/Gen6: Work around GPU hangs due to misaligned depth coordinate
241 - i965/Gen7: Work around GPU hangs due to misaligned depth coordinate
/third_party/icu/icu4c/source/config/
Dmh-hpux-acc28 # 4232 conversion to a more strictly aligned type may cause misaligned access.
/third_party/skia/third_party/externals/icu/source/config/
Dmh-hpux-acc28 # 4232 conversion to a more strictly aligned type may cause misaligned access.
/third_party/openGLES/extensions/IBM/
DIBM_cull_vertex.txt88 coordinates to be misaligned with the z axis in eye coordinates, this
/third_party/skia/third_party/externals/opengl-registry/extensions/IBM/
DIBM_cull_vertex.txt88 coordinates to be misaligned with the z axis in eye coordinates, this
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.td151 def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
154 "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode"
/third_party/libpng/
DREADME52 on big-endian processors that support misaligned data access, faster
/third_party/skia/third_party/externals/libpng/
DREADME52 on big-endian processors that support misaligned data access, faster
/third_party/musl/
DWHATSNEW141 fixed misaligned read/overread bug in strchr which could lead to
144 misaligned reads.
909 - misaligned memory accesses in mbsrtowcs
960 - misaligned stack when calling ctors/dtors (crashing on x86_64)
1411 - on or1k, some syscalls with 64-bit arguments were broken (misaligned)
1492 - misaligned memory accesses in static binaries with low-alignment TLS blocks
1678 - possibly misaligned pointer globals on arm (from an asm source file)
1719 - gethostbyname[2][_r] produced ip addresses in misaligned buffers
/third_party/mesa3d/src/amd/compiler/
DREADME-ISA.md245 When there is a misaligned multi-dword FLAT load/store instruction in WGP mode,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64.td177 def FeatureSlowMisaligned128Store : SubtargetFeature<"slow-misaligned-128store",
/third_party/ltp/scripts/
Dspelling.txt943 misalinged||misaligned
/third_party/skia/third_party/externals/opengl-registry/extensions/ARB/
DARB_compute_shader.txt1217 if <indirect> is negative or misaligned (bug
1259 are negative, misaligned, or run off the end of
DARB_sparse_texture.txt664 causes the next layer to become misaligned to the page size in linear
/third_party/openGLES/extensions/ARB/
DARB_compute_shader.txt1229 if <indirect> is negative or misaligned (bug
1271 are negative, misaligned, or run off the end of
DARB_sparse_texture.txt674 causes the next layer to become misaligned to the page size in linear
/third_party/node/deps/v8/src/codegen/ppc/
Dmacro-assembler-ppc.cc3188 int misaligned = (offset & 3); \ in CallRecordWriteStub()
3191 if (!is_int16(offset) || misaligned) { \ in CallRecordWriteStub()
/third_party/rust/crates/memchr/bench/data/sliceslice/
Dwords.txt2538 misaligned
/third_party/openGLES/extensions/EXT/
DEXT_sparse_texture.txt779 causes the next layer to become misaligned to the page size in linear
/third_party/skia/third_party/externals/opengl-registry/extensions/EXT/
DEXT_sparse_texture.txt779 causes the next layer to become misaligned to the page size in linear
/third_party/rust/crates/aho-corasick/bench/data/
Dwords-50004286 misaligned
/third_party/libffi/
DChangeLog2615 Fix misaligned memory access in ffi_call_int
2640 Fix misaligned memory access in ffi_call_int
7612 Fix for a crasher due to misaligned stack on x86-32.
7621 Fix for a crasher due to misaligned stack on x86-32.
7627 Fix for a crasher due to misaligned stack on x86-32.
/third_party/elfutils/libelf/
DChangeLog1480 * elf_begin.c (get_shnum): Avoid misaligned reads for matching endian.

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