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Searched refs:no_dd_clear (Results 1 – 11 of 11) sorted by relevance

/third_party/mesa3d/src/intel/tools/
Di965_asm.h72 unsigned no_dd_clear:1; // Dependency control member
Di965_gram.y300 options.no_dd_clear); in i965_asm_set_instruction_options()
571 options->no_dd_clear = BRW_DEPENDENCY_NOTCLEARED; in add_instruction_option()
/third_party/mesa3d/src/intel/compiler/
Dbrw_ir.h170 bool no_dd_clear:1; member
Dbrw_vec4_generator.cpp2097 brw_inst_set_no_dd_clear(p->devinfo, insn, inst->no_dd_clear); in generate_code()
2190 } else if (inst->no_dd_clear || inst->no_dd_check || inst->conditional_mod) { in generate_code()
2199 brw_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear); in generate_code()
Dtest_eu_validate.cpp2713 bool no_dd_clear; in TEST_P() member
2719 no_dd_check, no_dd_clear, expected_result) \ in TEST_P() argument
2730 no_dd_clear, \ in TEST_P()
2817 brw_inst_set_no_dd_clear(&devinfo, last_inst, inst[i].no_dd_clear); in TEST_P()
Dbrw_vec4.cpp821 last_grf_write[reg]->no_dd_clear = true; in opt_set_dependency_control()
833 last_mrf_write[reg]->no_dd_clear = true; in opt_set_dependency_control()
Dbrw_fs_reg_allocate.cpp1134 inst->no_dd_clear = false; in spill_reg()
Dbrw_fs_generator.cpp2516 if (inst->no_dd_clear || inst->no_dd_check || inst->conditional_mod) { in generate_code()
2526 brw_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear); in generate_code()
Dbrw_fs_scoreboard.cpp1318 inst->no_dd_check = inst->no_dd_clear = false; in emit_inst_dependencies()
Dbrw_vec4_visitor.cpp42 this->no_dd_clear = false; in vec4_instruction()
Dbrw_inst.h319 F8(no_dd_clear, /* 4+ */ 10, 10, /* 8+ */ 9, 9, /* 12+ */ -1, -1)