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Searched refs:num_inst (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_qpu_validate.c115 vc4_qpu_validate(uint64_t *insts, uint32_t num_inst) in vc4_qpu_validate() argument
128 for (int i = 0; i < num_inst; i++) { in vc4_qpu_validate()
159 assert(i + 2 <= num_inst); in vc4_qpu_validate()
214 for (int i = 0; i < num_inst; i++) { in vc4_qpu_validate()
230 for (int i = 0; i < num_inst - 1; i++) { in vc4_qpu_validate()
258 for (int i = 0; i < num_inst - 1; i++) { in vc4_qpu_validate()
274 for (int i = 0; i < num_inst - 1; i++) { in vc4_qpu_validate()
331 for (int i = 0; i < num_inst - 1; i++) { in vc4_qpu_validate()
347 for (int i = 0; i < num_inst - 1; i++) { in vc4_qpu_validate()
360 for (int i = 0; i < num_inst; i++) { in vc4_qpu_validate()
[all …]
Dvc4_qpu.h240 vc4_qpu_validate(uint64_t *insts, uint32_t num_inst);
/third_party/mesa3d/src/amd/vulkan/
Dradv_debug.c329 unsigned num_inst = 0; in radv_dump_annotated_shader() local
333 si_add_split_disasm(shader->disasm_string, start_addr, &num_inst, instructions); in radv_dump_annotated_shader()
339 for (i = 0; i < num_inst; i++) { in radv_dump_annotated_shader()
937 unsigned num_inst = 0; in radv_dump_faulty_shader() local
942 si_add_split_disasm(shader->disasm_string, start_addr, &num_inst, instructions); in radv_dump_faulty_shader()
945 for (unsigned i = 0; i < num_inst; i++) { in radv_dump_faulty_shader()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_debug.c913 unsigned num_inst = 0; in si_print_annotated_shader() local
920 si_add_split_disasm(screen, &rtld_binaries[0], &shader->prolog->binary, &inst_addr, &num_inst, in si_print_annotated_shader()
925 &num_inst, instructions, stage, shader->wave_size); in si_print_annotated_shader()
927 si_add_split_disasm(screen, &rtld_binaries[3], &shader->binary, &inst_addr, &num_inst, in si_print_annotated_shader()
930 si_add_split_disasm(screen, &rtld_binaries[4], &shader->epilog->binary, &inst_addr, &num_inst, in si_print_annotated_shader()
938 for (i = 0; i < num_inst; i++) { in si_print_annotated_shader()
/third_party/mesa3d/src/imagination/vulkan/pds/
Dpvr_pds.c4113 uint32_t num_inst; in pvr_pds_generate_single_ldst_instruction() local
4135 num_inst = 1; in pvr_pds_generate_single_ldst_instruction()
4142 num_inst = count / per_inst_count; in pvr_pds_generate_single_ldst_instruction()
4143 last_inst_count = count - per_inst_count * num_inst; in pvr_pds_generate_single_ldst_instruction()
4144 num_inst += 1; in pvr_pds_generate_single_ldst_instruction()
4148 for (uint32_t i = 0; i < num_inst; i++) { in pvr_pds_generate_single_ldst_instruction()
4149 if ((i == (num_inst - 1)) && (last_inst_count == 0)) in pvr_pds_generate_single_ldst_instruction()
4160 ld_src0 |= (((uint64_t)((i == num_inst - 1) ? last_inst_count in pvr_pds_generate_single_ldst_instruction()
4202 num_inst = count / PVR_ROGUE_PDSINST_ST_COUNT4_MAX_SIZE; in pvr_pds_generate_single_ldst_instruction()
4203 num_inst += ((count % PVR_ROGUE_PDSINST_ST_COUNT4_MAX_SIZE) == 0 ? 0 : 1); in pvr_pds_generate_single_ldst_instruction()
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/third_party/mesa3d/src/intel/compiler/
Dbrw_shader.cpp1235 unsigned num_inst = list->length(); in insert_before() local
1237 block->end_ip += num_inst; in insert_before()
1239 adjust_later_block_ips(block, num_inst); in insert_before()