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Searched refs:nxv4i1 (Results 1 – 12 of 12) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DSVEInstrFormats.td282 def _S : sve_int_ptrue<0b10, opc, asm, PPR32, nxv4i1, op>;
457 def : SVE_2_Op_Pat<nxv4i1, op, nxv4i1, nxv4i1, !cast<Instruction>(NAME # _S)>;
506 def : Pat<(i32 (op GPR32:$Rn, (nxv4i1 PPRAny:$Pg))),
508 def : Pat<(i64 (sext (i32 (op GPR32:$Rn, (nxv4i1 PPRAny:$Pg))))),
528 def : Pat<(i32 (op GPR32:$Rn, (nxv4i1 PPRAny:$Pg))),
545 def : Pat<(i64 (op GPR64:$Rn, (nxv4i1 PPRAny:$Pg))),
580 def : SVE_2_Op_Pat<nxv4i32, op, nxv4i32, nxv4i1, !cast<Instruction>(NAME # _S)>;
620 def : SVE_2_Op_Pat<i64, int_op, nxv4i1, nxv4i1, !cast<Instruction>(NAME # _S)>;
1030 def : SVE_1_Op_Pat<nxv4i1, op, nxv4i1, !cast<Instruction>(NAME # _S)>;
1195 def : SVE_3_Op_Pat<nxv4i32, op, nxv4i1, nxv4i32, nxv4i32, !cast<Instruction>(NAME # _S)>;
[all …]
DAArch64SVEInstrInfo.td965 …010100, "scvtf", ZPR32, ZPR32, int_aarch64_sve_scvtf, nxv4f32, nxv4i1, nxv4i32, Element…
966 …010101, "ucvtf", ZPR32, ZPR32, int_aarch64_sve_ucvtf, nxv4f32, nxv4i1, nxv4i32, Element…
969 …011100, "fcvtzs", ZPR32, ZPR32, int_aarch64_sve_fcvtzs, nxv4i32, nxv4i1, nxv4f32, Element…
971 …011101, "fcvtzu", ZPR32, ZPR32, int_aarch64_sve_fcvtzu, nxv4i32, nxv4i1, nxv4f32, Element…
1096 def : Pat<(AArch64ptest (nxv4i1 PPR:$pg), (nxv4i1 PPR:$src)),
1178 defm : pred_load<nxv4i32, nxv4i1, zext_masked_load_i8, LD1B_S_IMM>;
1179 defm : pred_load<nxv4i32, nxv4i1, asext_masked_load_i8, LD1SB_S_IMM>;
1180 defm : pred_load<nxv4i32, nxv4i1, zext_masked_load_i16, LD1H_S_IMM>;
1181 defm : pred_load<nxv4i32, nxv4i1, asext_masked_load_i16, LD1SH_S_IMM>;
1182 defm : pred_load<nxv4i32, nxv4i1, nonext_masked_load, LD1W_IMM>;
[all …]
DAArch64CallingConvention.td84 CCIfType<[nxv2i1, nxv4i1, nxv8i1, nxv16i1],
86 CCIfType<[nxv2i1, nxv4i1, nxv8i1, nxv16i1],
161 CCIfType<[nxv2i1, nxv4i1, nxv8i1, nxv16i1],
DAArch64RegisterInfo.td818 [ nxv16i1, nxv8i1, nxv4i1, nxv2i1 ], 16,
DAArch64ISelLowering.cpp169 addRegisterClass(MVT::nxv4i1, &AArch64::PPRRegClass); in AArch64TargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h152 nxv4i1 = 90, // n x 4 x i1 enumerator
441 case nxv4i1: in getVectorElementType()
624 case nxv4i1: in getVectorNumElements()
704 case nxv4i1: return TypeSize::Scalable(4); in getSizeInBits()
1025 if (NumElements == 4) return MVT::nxv4i1; in getScalableVectorVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp237 case MVT::nxv4i1: in getTypeForEVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td118 def nxv4i1 : ValueType<4, 90>; // n x 4 x i1 vector value
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc182 LocVT == MVT::nxv4i1 ||
195 LocVT == MVT::nxv4i1 ||
1174 LocVT == MVT::nxv4i1 ||
DAArch64GenFastISel.inc1264 if (RetVT.SimpleTy != MVT::nxv4i1)
1356 case MVT::nxv4i1: return fastEmit_AArch64ISD_REV_MVT_nxv4i1_r(RetVT, Op0, Op0IsKill);
5626 …case MVT::nxv4i1: return fastEmit_AArch64ISD_PTEST_MVT_nxv4i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1Is…
5906 if (RetVT.SimpleTy != MVT::nxv4i1)
6019 …case MVT::nxv4i1: return fastEmit_AArch64ISD_TRN1_MVT_nxv4i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsK…
6154 if (RetVT.SimpleTy != MVT::nxv4i1)
6267 …case MVT::nxv4i1: return fastEmit_AArch64ISD_TRN2_MVT_nxv4i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsK…
6431 if (RetVT.SimpleTy != MVT::nxv4i1)
6544 …case MVT::nxv4i1: return fastEmit_AArch64ISD_UZP1_MVT_nxv4i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsK…
6679 if (RetVT.SimpleTy != MVT::nxv4i1)
[all …]
DAArch64GenRegisterInfo.inc5186 /* 34 */ MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::Other,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsAArch64.td760 def llvm_nxv4i1_ty : LLVMType<nxv4i1>;