| /third_party/node/deps/v8/src/codegen/ia32/ |
| D | sse-instr.h | 112 V(pmaxud, 66, 0F, 38, 3F) \
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| /third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
| D | x86.hpp | 87 RValue<UInt4> pmaxud(RValue<UInt4> x, RValue<UInt4> y);
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| D | LLVMReactor.cpp | 2897 return x86::pmaxud(x, y); in Max()
3983 RValue<UInt4> pmaxud(RValue<UInt4> x, RValue<UInt4> y) in pmaxud() function
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| /third_party/node/deps/v8/src/codegen/x64/ |
| D | sse-instr.h | 180 V(pmaxud, 66, 0F, 38, 3F) \
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| /third_party/elfutils/libcpu/ |
| D | i386.mnemonics | 356 MNE(pmaxud)
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| D | x86_64.mnemonics | 345 MNE(pmaxud)
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| D | ChangeLog | 205 pcmpgtq, phminposuw, pinsrb, pinsrd, pmaxsb, pmaxsd, pmaxud, pmaxuw,
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| /third_party/node/deps/v8/src/codegen/shared-ia32-x64/ |
| D | macro-assembler-shared-ia32-x64.h | 377 AVX_OP_SSE4_1(Pmaxud, pmaxud)
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| /third_party/elfutils/libcpu/defs/ |
| D | i386 | 942 01100110,00001111,00111000,00111111,{Mod}{xmmreg}{R_m}:pmaxud {Mod}{R_m},{xmmreg}
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| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| D | liftoff-assembler-x64.h | 2697 liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaxud, &Assembler::pmaxud>( in emit_i32x4_gt_u()
3294 liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaxud, &Assembler::pmaxud>( in emit_i32x4_max_u()
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| /third_party/elfutils/tests/ |
| D | testfile44.expect.bz2 | |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| D | ChangeLog | 3826 pmaxsd, pmaxud, pmaxuw, pminsb, pminsd, pminud, pminuw, pmovsxbw,
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| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| D | liftoff-assembler-ia32.h | 3097 liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaxud, &Assembler::pmaxud>( in emit_i32x4_gt_u()
3720 liftoff::EmitSimdCommutativeBinOp<&Assembler::vpmaxud, &Assembler::pmaxud>( in emit_i32x4_max_u()
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| D | code-generator-ia32.cc | 2414 __ pmaxud(dst, src); in AssembleArchInstruction() local
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| D | code-generator-x64.cc | 3287 ASSEMBLE_SIMD_BINOP(pmaxud); in AssembleArchInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrSSE.td | 5833 defm PMAXUD : SS48I_binop_rm<0x3F, "pmaxud", umax, v4i32, VR128,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 7729 "maxub\006pmaxud\006pmaxuw\006pminsb\006pminsd\006pminsw\006pminub\006pm"
9711 …{ 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK…
9712 …{ 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128…
24265 …{ 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK…
24266 …{ 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, …
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