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Searched refs:pred_sel (Results 1 – 18 of 18) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/r600/
Dr700_asm.c47 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in r700_bytecode_alu_build()
93 alu->pred_sel = G_SQ_ALU_WORD0_PRED_SEL(word0); in r700_bytecode_alu_read()
Deg_asm.c273 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in eg_bytecode_alu_build()
284 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in eg_bytecode_alu_build()
Dr600_asm.c713 alu_prev->pred_sel == alu->pred_sel) { in replace_gpr_with_pv_ps()
723 alu_prev->pred_sel == alu->pred_sel) { in replace_gpr_with_pv_ps()
827 if (prev[i]->pred_sel) in merge_inst_groups()
840 if (slots[i]->pred_sel) in merge_inst_groups()
1719 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in r600_bytecode_alu_build()
2364 alu->pred_sel ? alu->pred_sel==2 ? '0':'1':' '); in r600_bytecode_disasm()
2891 alu->pred_sel = G_SQ_ALU_WORD0_PRED_SEL(word0); in r600_bytecode_alu_read()
Dr600_asm.h63 unsigned pred_sel; member
/third_party/mesa3d/src/gallium/drivers/r600/sb/
Dsb_ssa_builder.cpp187 assert(n.bc.pred_sel); in visit()
192 psi->src[4] = sh.get_pred_sel(n.bc.pred_sel - PRED_SEL_0); in visit()
314 value* ps = sh.get_pred_sel(an->bc.pred_sel - PRED_SEL_0); in rename_use()
Dsb_dump.cpp339 sblog << (a.bc.pred_sel-2) << " [" << *a.pred << "] "; in dump_op()
413 sblog << (n->bc.pred_sel-2) << " [" << *n->pred << "] "; in dump_alu()
Dsb_bc_dump.cpp383 s << (n.bc.pred_sel>=2 ? (n.bc.pred_sel == 2 ? "0" : "1") : " "); in dump()
Dsb_bc.h524 unsigned pred_sel:2; member
554 pred_sel = 0; in clear()
Dsb_bc_builder.cpp390 .PRED_SEL(bc.pred_sel) in build_alu()
412 .PRED_SEL(bc.pred_sel) in build_alu()
Dsb_bc_decoder.cpp299 bc.pred_sel = w0.get_PRED_SEL(); in decode_alu()
318 bc.pred_sel = iw0.get_PRED_SEL(); in decode_alu()
Dsb_bc_finalize.cpp345 n->bc.pred_sel = PRED_SEL_OFF; in finalize_alu_group()
Dsb_bc_parser.cpp470 if (n->bc.pred_sel) { in prepare_alu_group()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DEvergreenInstructions.td490 let pred_sel = 0;
533 LAST:$last, R600_Pred:$pred_sel,
535 " "#name#" $last OQAP, $src0$src0_rel $pred_sel",
555 LAST:$last, R600_Pred:$pred_sel,
557 " "#name#" $last "#dst#"$src0$src0_rel, $src1$src1_rel, $pred_sel",
588 LAST:$last, R600_Pred:$pred_sel, BANK_SWIZZLE:$bank_swizzle),
589 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
DR600ExpandSpecialInstrs.cpp105 R600::OpName::pred_sel); in runOnMachineFunction()
107 R600::OpName::pred_sel); in runOnMachineFunction()
DR600Packetizer.cpp187 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether()
188 OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel); in isLegalToPacketizeTogether()
DR600InstrFormats.td84 bits<2> pred_sel;
99 let Word0{30-29} = pred_sel;
DR600Instructions.td108 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
113 "$pred_sel $bank_swizzle"),
151 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
157 "$pred_sel $bank_swizzle"),
192 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
198 "$pred_sel"
DR600InstrInfo.cpp1308 OPERAND_CASE(R600::OpName::pred_sel) in getSlotedOps()
1350 getSlotedOps(R600::OpName::pred_sel, Slot))); in buildSlotOfVectorInstruction()
1351 MIB->getOperand(getOperandIdx(Opcode, R600::OpName::pred_sel)) in buildSlotOfVectorInstruction()