Searched refs:ra_class_add_reg (Results 1 – 11 of 11) sorted by relevance
/third_party/mesa3d/src/util/tests/ |
D | register_allocate_test.cpp | 100 ra_class_add_reg(reg32low, vreg); in TEST_F() 109 ra_class_add_reg(reg64low, vreg); in TEST_F() 118 ra_class_add_reg(reg96, vreg); in TEST_F() 135 ra_class_add_reg(reg32low, i); in TEST_F() 140 ra_class_add_reg(reg64low, i); in TEST_F() 145 ra_class_add_reg(reg96, i); in TEST_F() 158 ra_class_add_reg(low, i); in TEST_F() 162 ra_class_add_reg(high, i); in TEST_F() 179 ra_class_add_reg(c1, i); in TEST_F() 183 ra_class_add_reg(c2, i); in TEST_F() [all …]
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/third_party/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_register_allocate.c | 135 ra_class_add_reg(vc4->reg_class_r0_r3, i); in vc4_alloc_reg_set() 136 ra_class_add_reg(vc4->reg_class_a_or_b_or_acc[0], i); in vc4_alloc_reg_set() 137 ra_class_add_reg(vc4->reg_class_a_or_b_or_acc[1], i); in vc4_alloc_reg_set() 144 ra_class_add_reg(vc4->reg_class_r4_or_a[i], ACC_INDEX + 4); in vc4_alloc_reg_set() 145 ra_class_add_reg(vc4->reg_class_any[i], ACC_INDEX + 4); in vc4_alloc_reg_set() 156 ra_class_add_reg(vc4->reg_class_any[0], i); in vc4_alloc_reg_set() 157 ra_class_add_reg(vc4->reg_class_a_or_b[0], i); in vc4_alloc_reg_set() 158 ra_class_add_reg(vc4->reg_class_a_or_b_or_acc[0], i); in vc4_alloc_reg_set() 161 ra_class_add_reg(vc4->reg_class_any[1], i); in vc4_alloc_reg_set() 162 ra_class_add_reg(vc4->reg_class_a_or_b[1], i); in vc4_alloc_reg_set() [all …]
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/third_party/mesa3d/src/broadcom/compiler/ |
D | vir_register_allocate.c | 915 ra_class_add_reg(compiler->reg_class_phys_or_acc[threads], i); in vir_init_reg_sets() 916 ra_class_add_reg(compiler->reg_class_phys[threads], i); in vir_init_reg_sets() 917 ra_class_add_reg(compiler->reg_class_any[threads], i); in vir_init_reg_sets() 921 ra_class_add_reg(compiler->reg_class_phys_or_acc[threads], i); in vir_init_reg_sets() 922 ra_class_add_reg(compiler->reg_class_any[threads], i); in vir_init_reg_sets() 927 ra_class_add_reg(compiler->reg_class_r5[threads], in vir_init_reg_sets() 929 ra_class_add_reg(compiler->reg_class_any[threads], in vir_init_reg_sets()
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/third_party/mesa3d/src/util/ |
D | register_allocate.h | 69 void ra_class_add_reg(struct ra_class *c, unsigned int reg);
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D | register_allocate.c | 267 ra_class_add_reg(struct ra_class *class, unsigned int r) in ra_class_add_reg() function
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/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_compiler_nir_ra.c | 98 ra_class_add_reg(classes[reg_get_class(r)], r); in etna_ra_setup()
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/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
D | regalloc.c | 65 ra_class_add_reg(classes[i], j + swiz); in ppir_regalloc_init() 74 ra_class_add_reg(classes[i], j); in ppir_regalloc_init()
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_fs_reg_allocate.cpp | 145 ra_class_add_reg(classes[i], reg); in brw_alloc_reg_set() 148 ra_class_add_reg(classes[i], reg); in brw_alloc_reg_set() 161 ra_class_add_reg(aligned_bary_class, i); in brw_alloc_reg_set()
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D | brw_vec4_reg_allocate.cpp | 126 ra_class_add_reg(compiler->vec4_reg_set.classes[i], j); in brw_vec4_alloc_reg_set()
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/third_party/mesa3d/src/imagination/rogue/ |
D | rogue_regalloc.c | 115 ra_class_add_reg(reg_data->class, r); in rogue_ra_init()
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/third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_pair_regalloc.c | 709 ra_class_add_reg(s->classes[class->ID], reg_id); in rc_init_regalloc_state()
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