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Searched refs:setle (Results 1 – 22 of 22) sorted by relevance

/third_party/ltp/tools/sparse/sparse-src/validation/backend/
Dcmp-ops.c21 static int setle(int x, int y) in setle() function
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrFloat.td92 def : Pat<(setle f32:$lhs, f32:$rhs), (LE_F32 f32:$lhs, f32:$rhs)>;
98 def : Pat<(setle f64:$lhs, f64:$rhs), (LE_F64 f64:$lhs, f64:$rhs)>;
DWebAssemblyInstrSIMD.td508 [setgt, GT_v4f32], [setle, LE_v4f32], [setge, GE_v4f32]] in
513 [setgt, GT_v2f64], [setle, LE_v2f64], [setge, GE_v2f64]] in
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrInfo.td1478 // bcond-setle
1481 <(brcond (i32 (setle CPU16Regs:$rx, CPU16Regs:$ry)), bb:$imm16),
1639 def : Mips16Pat<(select (i32 (setle CPU16Regs:$a, CPU16Regs:$b)),
1789 // setle
1792 <(setle CPU16Regs:$lhs, CPU16Regs:$rhs),
DMipsCondMov.td67 def : MipsPat<(select (i32 (setle CRC:$lhs, CRC:$rhs)), DRC:$T, DRC:$F),
DMipsInstrInfo.td2235 def BLEZ : MMRel, CBranchZero<"blez", brtarget, setle, GPR32Opnd>,
3223 def : MipsPat<(brcond (i32 (setle RC:$lhs, RC:$rhs)), bb:$dst),
3255 def : MipsPat<(setle RC:$lhs, RC:$rhs),
DMips32r6InstrInfo.td1040 def : MipsPat<(setle VT:$lhs, VT:$rhs),
DMips64InstrInfo.td274 def BLEZ64 : CBranchZero<"blez", brtarget, setle, GPR64Opnd>, BGEZ_FM<6, 0>,
DMicroMipsInstrInfo.td991 def BLEZ_MM : MMRel, CBranchZero<"blez", brtarget_mm, setle, GPR32Opnd>,
DMicroMips32r6InstrInfo.td1835 def : MipsPat<(brcond (i32 (setle GPR32:$lhs, GPR32:$rhs)), bb:$dst),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPatterns.td646 def: OpR_RR_pat<F2_sfcmpge, RevCmp<setle>, i1, F32>;
658 def: OpR_RR_pat<F2_dfcmpge, RevCmp<setle>, i1, F64>;
665 def: Pat<(i1 (setle I32:$Rs, anyimm:$u5)),
680 def: OpmR_RR_pat<Outn<C2_cmpgt>, setle, i1, I32>;
685 def: OpmR_RR_pat<Outn<C2_cmpgtp>, setle, i1, I64>;
690 def: OpmR_RR_pat<Outn<A4_vcmpbgt>, setle, v8i1, V8I8>;
695 def: OpmR_RR_pat<Outn<A2_vcmphgt>, setle, v4i1, V4I16>;
700 def: OpmR_RR_pat<Outn<A2_vcmpwgt>, setle, v2i1, V2I32>;
891 defm: SelMinMax16_pats<setle, A2_min, A2_max>;
903 defm: MinMax_pats<A2_max, A2_min, select, setle, i1, I32>;
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreInstrInfo.td1176 def : Pat<(brcond (setle GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
1204 def : Pat<(select (setle GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
1223 def : Pat<(setle GRRegs:$lhs, GRRegs:$rhs),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td292 def : PatFpr64Fpr64<setle, FLE_D>;
DRISCVInstrInfoF.td349 def : PatFpr32Fpr32<setle, FLE_S>;
DRISCVInstrInfo.td859 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
893 def : BccSwapPat<setle, BGE>;
/third_party/mesa3d/src/mesa/x86/
Dassyntax.h622 #define SETLE(a) CHOICE(setle a, setle a, setle a)
1335 #define SETLE(a) setle a
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td1310 def setle : PatFrag<(ops node:$lhs, node:$rhs),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td1728 defm : ISET_FORMAT_SIGNED<setle, CmpLE>;
1866 defm FSetLE : FSET_FORMAT<setle, CmpLE, CmpLE_FTZ>;
/third_party/elfutils/tests/
Dtestfile44.expect.bz2
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td3185 def NG : CondCodeAlias<Prefix, Suffix, "ng", "le", V>; // setng -> setle
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc2055 Mnemonic = "setle"; // "setng"
7755 "a\005setae\004setb\005setbe\004sete\004setg\005setge\004setl\005setle\005"
10242 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
10243 { 7176 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, },
24806 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
24807 { 7176 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, },